Content originally posted in LPCWare by RPrice on Sat Nov 10 10:21:50 MST 2012
Hi thanks, for all this.
We think the problem is parasitic noise occuring both on the sample input inside the chip (it's fine when it goes in on the pin) and at the output of the separate DAC. We haven't followed guidelines on separating the ground plane around the clock and separating the ground planes for analogue and digital components.
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1.- Implement a simple moving average filter. It means, take some samples, say 8, and add them up, and finally divide the result by 8.
2.- Through RS232 (if possible) send your samples to your PC, save them, and then analize them using Matlab or Octave.
Finally, the DAC's output is going to be always staircase (unless the DAC resolution is infinite). That's way you must have a low-pass filter in its output in order to smooth the outgoing signal (take a look with an oscilloscope).
The oversampling option is something we're loathe to sacrifice clock cycles to.
We can't interface back with the PC because we have to test the system on the PCB and we haven't designed it with this in mind. We have a mini USB connector on the board to upload firmware but I don't think we can use this for sending serial data back while its running (I'm new to the LPC1343)
I realise the DACs output will staircase but that shouldn't manifest itself as a whine heard on steady input, this has to be parasitic noise on the DAC output caused by the LPC. I'm leaning this because when we tried hooking a heartbeat LED to a spare pin on the board so that it would light up when a certain single value was sampled by the ADC and fed it from a variable resistor we could get a steady light. Even looking at the voltage from the pin on the scope it seemed fairly stable which would indicated that the noise is occurring at the DAC.
I think it is cause by the LPC as changing the clock frequency or the ADC interrupt timer changes the pitch of the whine.
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What does your hardware look like?
The two input signals go into It's a quad op amp that biases them into the ADC's range then into an RC filter and then into ADC. Then the digital output goes to the DAC via SPI then back to the other two inputs on the quad op amp, into a headphone amplifier and out to the jacks.
The whole thing is run off a single 3V battery power supply which gets regulated but isn't filtered much. I'm a bit concerned that we haven't attempted to split the supplies in to one for the analogue and digital components. The negative rail for the op amps comes off a charge pump in the headphone amplifier.
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To start with: the Vref- should be connected to the ground plane or even better to a separate trace going to the GND input of your board. This is also where other analog grounds (analog input, opamp voltage) should go.
The Vref signal should at least be decoupled from the main 3.3V using a choke and a capacitor (I use both a normal elco plus a ceramic capacitor) and for a real ADC application I would suggest to use a separate reference source.
When just decoupling, make sure that the capacitors are places close to the pins as possible and your 3.3V source comes as close to the 3.3V regulator's output capacitor as possible.
The 1343 doesn't have a separate Vref and Vref- it has VDD, VSS. We're using the FHN33 package, it asks for VDD on pin 6 and pin 29 but we can't work which is used as Vref for the ADC. Quite whether we should power the whole chip from the analogue or digital supply confuses me, I guess the main thing might be to try and separate the powersupply and ground for the chip and DAC / op-amps and potentially use two separate op-amps to eliminate cross talk (though our gain levels are really very low).
I guess try using a choke and two caps on the powersupply to the LPC?
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You might google
adc pcb layout
and a bunch of guidelines will be found. Among others I'd recommend you:
UM10375 (NXP)
AN2764 (FreeScale)
AN2321 (FreeScale)
Cheers, I think I have the UM10375 but I'll dig through the other two.
All ideas and comments are gratefully received.