Pascal Drecker

MCF5445X: pin assignment for DDR2

Discussion created by Pascal Drecker on May 26, 2008
Latest reply on May 28, 2008 by John Weil
Hello,

it's the first time that I use a sdram. I decide to take a single chip solution (DDR2 SDRAM 84-Ball, 8 M words x 16 bits x 4 banks).

My planned pin assignment for the 16-bit data bus:

SD_DATA[31] to DQ15 of DDR2 SDRAM
SD_DATA[30] to DQ14 of DDR2 SDRAM
SD_DATA[26] to DQ13 of DDR2 SDRAM
...
SD_DATA[17] to DQ1 of DDR2 SDRAM
SD_DATA[16] to DQ0 of DDR2 SDRAM

The pin assignment for the most signals is clear. But I am unsure with the following signals:

a) Connect SD_DQM3 for SD_D[31:24] to UDM of the DDR2 SDRAM?
b) Connect SD_DQM2 for SD_D[23:16] to LDM of the DDR2 SDRAM?
c) Connect SD_DQS3 for SD_D[31:24] to UDQS of the DDR2 SDRAM?
d) Connect SD_DQS2 for SD_D[32:16] to LDQS of the DDR2 SDRAM?
e) What to do with the signals /UDQS and /LDQS? Left floating?

Looking at the schematics of the M54455EVB I realize that the pin assignment of each 'data bus byte' is in the reverse order.

upper byte
-----
SD_DATA[31] to DQ8 of DDR2 SDRAM
SD_DATA[30] to DQ9 of DDR2 SDRAM
...
SD_DATA[25] to DQ14 of DDR2 SDRAM
SD_DATA[24] to DQ15 of DDR2 SDRAM

lower byte
-----
SD_DATA[23] to DQ0 of DDR2 SDRAM
SD_DATA[22] to DQ1 of DDR2 SDRAM
...
SD_DATA[17] to DQ6 of DDR2 SDRAM
SD_DATA[16] to DQ7 of DDR2 SDRAM

Is there a special reason?

Regards,
Pascal

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