IRQ Interrupt Handler: LPC3250

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IRQ Interrupt Handler: LPC3250

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by jubiamathew on Fri Jul 31 02:59:40 MST 2015
We have created a project for LPC3250 processor on a custom board. We have a hardware interrupt to GPIO-2. If we enable this interrupt before calling the main function as it is done in the default start-up file(cr_startup_lpc32.s), then system goes to the IRQ mode and IRQ will be disabled in the Program Status Register(CPSR) and interrupts are not getting processed. The dis-assembly view does not show the code which is loaded, control is at . If we try to enable the interrupts by setting a value 0x5F to CPSR inside main function the execution does not proceed from that point. We are in a confusion on when and how to enable  the interrupts? Can you please help us on this?

Given below is the modified vector table.

Vectors:
        LDR   pc,_rset                 // reset
        LDR   pc,_undf                  // undefined
        LDR   pc,_swi                   // SWI/SVC
        LDR   pc,_pabt                  // program abort
        LDR   pc,_dabt                  // data abort
        NOP                             // Reserved for the flash checksum
//      LDR   pc,[pc,#-0xFF0]           // IRQ - read the VIC register
        LDR      pc,_irq                    // or go to default handler
        LDR   pc,_fiq                   // FIQ

_rset:    .word _mainCRTStartup           // reset handler - from cr_startup_lpc32xx.s
_undf:  .word __undf                    // undefined
_swi:   .word _swi_handler                // SWI
_pabt:  .word __pabt                    // program abort
_dabt:  .word __dabt                    // data abort
_irq:   .word CIrqHandler
_fiq:   .word __fiq                        // FIQ

/*
* Some simple default handlers
*/
__undf: B     .                        // undefined
__pabt: B     .                         // program abort
__dabt: B     .                         // data abort
/*__irq:  B     _CIrqHandler    */              // IRQ
__fiq:  B     .                         // FIQ


CIrqHandler definition:
ISR-CIrqHandler is defined in main.c.
void CIrqHandler(void)
{
}
Also please let us know if this is the correct way of ISR branching if the function is in C.
We did not find relevant information in the FAQ:https://www.lpcware.com/content/faq/lpcxpresso/startup-code-interrupt-handlers
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by TheFallGuy on Thu Aug 06 02:42:32 MST 2015
And what is the function at address 0x44? That should give you a clue as to how you got there.

Look, you have got to help yourself here - I am not in a position to debug your code for you. First of all you need to read a book on booting ARM9 processors, so you understand what is happening. Then you need to debug your startup code to understand what it is doing.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by jubiamathew on Thu Aug 06 02:23:55 MST 2015
By the word hang I meant that it is in an infinite loop. The control goes to the address 0x44, once the startup calls main.
I have attached the startup and vector files. Please verify.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by TheFallGuy on Thu Aug 06 00:30:41 MST 2015
Programs NEVER hang - they are always doing something... Have you debugged to find out what it is doing, and where it is doing it? My guess is that you have hit a fault and the code is probably spinning in the default fault handler. Have you set up the interrupt stack? Have you set up the vector table correctly? Note that ARM9 devices are very different to Cortex-M...
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by jubiamathew on Thu Aug 06 00:07:04 MST 2015
Please help us to resolve the problem. Our code runs properly if interrupt is disabled.
Once we enable the interrupts in CPSR, the program hangs.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by jubiamathew on Mon Aug 03 22:37:04 MST 2015
Should this be there only for prototype, the program does not build if we add it in function definition.
This is how we have prototyped the function
void CIrqHandler (void) __attribute__ ((interrupt ("IRQ")));
and the declaration is
void CIrqHandler (void)

Still we are not able to invoke the ISR.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by whitecoe on Mon Aug 03 00:21:14 MST 2015
So that will be because __irq is a Keil/RealView extension.  Check their documentation for details of what this extension does!

For GCC, try:

void f () __attribute__ ((interrupt ("IRQ")));


https://gcc.gnu.org/onlinedocs/gcc/ARM-Function-Attributes.html#ARM-Function-Attributes

HTH!
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by jubiamathew on Sun Aug 02 23:04:47 MST 2015
Thank You for the response. We were not able to find an example which uses interrupts. Only the ResetHandler is present in the examples.
We are using the similar code with Keil and is able to invoke the ISR properly. We are sure that the processor specific interrupt registers are set properly. In Keil project, before calling main function from ResetHandler the mode is changed to system mode by instruction 'MSR     CPSR_c, #Mode_SYS'.
If we try to do the same in LPC Expresso the control goes to some addresses like 0x00000008,0x00000004,0x00000018 etc.
In Keil project we have IMPORT InterruptHandler in the startup file and the ISR that is defined in main.c is defined as void CIrqHandler(void) __irq . LPCExpresso is giving build error if we have __irq with C function and IMPORT in .s file.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by lpcxpresso-support on Fri Jul 31 06:18:14 MST 2015
That FAQ relates to Cortex-M based parts. And if this is a new design, you might want to consider switching to using such a part (for example the LPC43xx family) rather than using an old ARM9 based part.

The interrupt system on these ARM9 parts are completely different to the Cortex-M system. You need to study the LPC32xx user manual for more details. I would also recommend studying ARM's own documentation on the ARM926, as well as the related 'VIC' interrupt controller.

There is a simple LPCXpresso example for the similar LPC31xx family in the Examples directory of your LPCXpresso install which I think uses interrupts that you might want to look at, and also the Common Driver Library examples available from the below page (though these are not supplied in LPCXpresso format):

https://www.lpcware.com/node/11538/107

There have also been a few previous threads you might want to search for in the forum about interrupts with LPC2000 parts, which although based on ARM7, have a similar VIC to the ARM9 parts.

Regards,
LPCXpresso Support
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