Content originally posted in LPCWare by Marwincencov on Mon Nov 14 15:01:47 MST 2011
Thank you
Sorry I edited my answer.
I found new firmware because I have some problems when I'm programing for example LPC1769 or LPC1788.
For example I tried Ethernet in LPC1788. So I set up new project reference from CMSISv2p00 LPC177x_8x, made clearly project and flash - correctly. Next I copy libraries from EasyWeb for LPC1769 and change RAM address, make, flash - correctly. Next flash correctly and next flash (same firmware) Error "15: Target error from Commit Flash write System rejected access at location 0xE000EDF0 - verify Population of memory and peripheral"
So tried delete every things which added flash correctly. Next I added below text to main and same problem. Why I don't know:(
(After Error dialog I had to reset with P2.10 pull down for next attempt programming)
volatile unsigned int loop;
// Set Ethernet power/clock control bit
LPC_SC->PCONP |= PCENET;
// Set up MAC Configuration Register 1
LPC_EMAC->MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX |
MAC1_RES_MCS_RX |MAC1_SIM_RES | MAC1_SOFT_RES;
// Set up MAC Command Register
LPC_EMAC->Command = CR_REG_RES | CR_TX_RES | CR_RX_RES | CR_PASS_RUNT_FRM;
// Short delay
for (loop = 10000; loop; loop--);
// Set up MAC Configuration Register 1 to pass all receive frames
LPC_EMAC->MAC1 = MAC1_PASS_ALL;
// Set up MAC Configuration Register 2 to append CRC and pad out frames
LPC_EMAC->MAC2 = MAC2_CRC_EN | MAC2_PAD_EN;
// Set Ethernet Maximum Frame Register
LPC_EMAC->MAXF = ETH_MAX_FLEN;
// Set Collision Window / Retry Register
LPC_EMAC->CLRT = CLRT_DEF;
// Set Non Back-to-Back Inter-Packet-Gap Register
LPC_EMAC->IPGR = IPGR_DEF;
// Enable Reduced MII interface.
LPC_EMAC->MCFG = MCFG_CLK_DIV64 | MCFG_RES_MII;
for (loop = 100; loop; loop--);
LPC_EMAC->MCFG = MCFG_CLK_DIV64;
// Set MAC Command Register to enable Reduced MII interface
// and prevent runt frames being filtered out
LPC_EMAC->Command = CR_PASS_RUNT_FRM | CR_PASS_RX_FILT;
