LPC1769 Configure Clock?

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by belskyc on Thu Mar 21 17:11:28 MST 2013
Really basic question.  On the LPC1769, I'm trying to setup the clock such that:
CCLK = OSC_CLK.  Here's the initializing code I tried:

LPC_SC->CLKSRCSEL &= ~(0x00000003);  // sysclk = osc_clk: Setup External Oscillator = 12Mhz.
LPC_SC->CLKSRCSEL |=  (0x00000001);
LPC_SC->PLL0CON   &= ~(0x00000003);  // pllclk = sysclk: Disable and bypass PLL.
LPC_SC->CCLKCFG   &= ~(0x000000FF);  // cclk = pllclk = sysclk:  Clock Divide = 1.

When I try to run on the LPCXpresso LPC1769 demo board, the debugger crashes.  However, if I comment out this and rely on register defaults for the clock (using the IRC - Internal RC Oscillator), it runs. 

Does anyone see what I'm missing or have any examples on simple configurations of the clock? 

Thanks much,