Change CCLK in LPC1769

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by saipushpak on Mon Nov 19 02:58:32 MST 2012
I am trying to change the clock output by changing the value of CCLKCFG_val to 0x05 that is a division of 6 (in the file system_LPC17XX.c)

But the new value is not written to the register and it still comtinues to divide by 4 (the default value).

default value is:
#define CCLKCFG_Val        0x00000003