LPC1768 RITtimer code.bundle example bugs

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

LPC1768 RITtimer code.bundle example bugs

648 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by solsal on Thu Aug 30 07:14:17 MST 2012
Hi,

please refer to UM10360 page:502:

"""""""""""""""""""""""""""""""""""""
Table 436. RI Control register (RICTRL - address 0x400B 0008) bit description

Bit   Symbol    Value      Description                                               Resetvalue

0     RITINT               Interruptflag                                                  0

                  1        This bit is set to 1 by hardware whenever the counter value equals the masked
                           compare value specified by the contents of RICOMPVAL and RIMASK registers.
                           Writing a 1 to this bit will clear it to 0. Writing a 0 has no effect.
                 
                  0        The counter value does not equal the masked compare value.
========================================================================================================
1     RITENCLR             Timer enable clear                                              0

                  1      The timer will be cleared to 0 whenever the counter value equals the masked compare
                         value specified by the contents of RICOMPVAL and RIMASK registers. This will occur
                         on the same clock that sets the interrupt flag.
                 
                  0      The timer will not be cleared to 0.
========================================================================================================
2      RITENBR             Timer enable for debug                                           1

                  1        The timer is halted when the processor is halted for debugging.
                  0        Debug has no effect on the timer operation.
========================================================================================================
3      RITEN               Timer enable.                                                    1

                  1        Timer enabled.
                           Remark: This can be overruled by a debug halt if enabled in bit 2.
                  0        Timer disabled.
========================================================================================================
31:4 - - Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.

"""""""""""""""""""""""""""""""""""""

as you see :

the bit0 = RITINT   = Interruptflag

the bit1 = RITENCLR = Timer enable clear

the bit2 = RITENBR  = Timer enable for debug

the bit3 = RITEN    = Timer enable. ......................... this is the enable/disable bit for RIT

------------------------------------------------------------------------------------------------------

but in RIT example from code.bundle.2 , they are using wrong bits fro enable the timer !!!

and surprisingly the timer is working !!! because it is enabled in reset , not by this codes!!!

this code need to be changed to correct codes.

regards

------------------------------------------------------------------------------------------------------

RITtimer.c

/****************************************************************************
*   $Id:: RITtimer.c 5739 2010-11-30 22:34:36Z usb00423                    $
*   Project: NXP LPC17xx RIT Timer example
*
*   Description:
*     This file contains RIT Timer code example which include RIT
*     initialization, RIT interrupt handler, and APIs for RIT Timer.
*
****************************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
****************************************************************************/
#include "lpc17xx.h"
#include "type.h"
#include "rittimer.h"

volatile uint32_t rit_timer_counter = 0;

/******************************************************************************
** Function name:        RIT_IRQHandler
**
** Descriptions:        RIT timer interrupt handler
**
** parameters:            None
** Returned value:        None
**
******************************************************************************/
void RIT_IRQHandler (void)

  LPC_RIT->RICTRL |= (0x1<<0);        /* clear interrupt flag */
  rit_timer_counter++;
  return;
}

/******************************************************************************
** Function name:        enable_rit_timer
**
** Descriptions:        Enable RIT timer
**
** parameters:            None
** Returned value:        None
**
******************************************************************************/
void enable_rit_timer( void )
{
  LPC_RIT->RICTRL |= ((0x1<<0)|(0x1<<1));
  return;
}

/******************************************************************************
** Function name:        disable_rit_timer
**
** Descriptions:        Disable RIT timer
**
** parameters:            None
** Returned value:        None
**
******************************************************************************/
void disable_rit_timer( void )
{
  LPC_RIT->RICTRL &= ~((0x1<<0)|(0x1<<1));
  return;
}

/******************************************************************************
** Function name:        reset_rit_timer
**
** Descriptions:        Reset RIT timer
**
** parameters:            None
** Returned value:        None
**
******************************************************************************/
void reset_rit_timer( void )
{
  LPC_RIT->RICTRL |= (0x1<<1);
  return;
}

/******************************************************************************
** Function name:        init_rit_timer
**
** Descriptions:        Initialize timer, set timer interval, reset timer,
**                        install timer interrupt handler
**
** parameters:            timer interval
** Returned value:        None
**
******************************************************************************/
void init_rit_timer ( uint32_t TimerInterval )
{
  LPC_SC->PCONP |= (1 << 16);

  disable_rit_timer();
  rit_timer_counter = 0;
  LPC_RIT->RICOMPVAL = TimerInterval;
  NVIC_EnableIRQ(RIT_IRQn);
  return;
}

/******************************************************************************
**                            End Of File
******************************************************************************/
.
.
.
.
.
.
.
.
.
correct codes:

/******************************************************************************
** Function name:        enable_rit_timer
**
** Descriptions:        Enable RIT timer
**
** parameters:            None
** Returned value:        None
**
******************************************************************************/
void enable_rit_timer( void )
{
  LPC_RIT->RICTRL |= ((0x1<<0)|(0x1<<1)|(0x1<<3));
  return;
}

/******************************************************************************
** Function name:        disable_rit_timer
**
** Descriptions:        Disable RIT timer
**
** parameters:            None
** Returned value:        None
**
******************************************************************************/
void disable_rit_timer( void )
{
  // LPC_RIT->RICTRL &= ~((0x1<<0)|(0x1<<1)|(0x1<<3));
    LPC_RIT->RICTRL = ( LPC_RIT->RICTRL & (~((0x1<<1)|(0x1<<3))) ) | (0x1<<0) ; // remove possibly interrupt
  return;
}
0 Kudos
2 Replies

478 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by NXP_Europe on Thu Aug 30 13:38:16 MST 2012
Hello solsal,

thanks for the feedback.
0 Kudos

478 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by solsal on Thu Aug 30 07:33:03 MST 2012
RI Mask register (RIMASK - 0x400B 0004)

mask register definition

page 501:

Table 435. RI Compare Value register (RICOMPVAL - address 0x400B 0004) bit description
Bit Symbol Description Reset value
31:0 RIMASK Mask register. This register holds the 32-bit mask value.

[B]A &#8216;1&#8217; written to any bit will force a
compare on the corresponding bit of the counter and compare register.[/B]

====================================================================

page 502:

but : writing &#8216;1&#8217; to the bits , will remove(mask) that bit from comparison.

[B]Any bit or combination of bits can be removed from this comparison (i.e. forced to
compare) by writing a &#8216;1&#8217; to the corresponding bit(s) in the RIMASK register.[/B]
0 Kudos