lpcware

Can't drive I/O pins on LPCXpresso 812 board?

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by ECamino on Mon Jul 13 07:03:34 MST 2015
Hi,

We're trying to drive ports on the LPCXpresso 812 board. Using LPCopen example periph_blinky, we can't get port0 8 or 9 to work but can get port 11.

To set up the ports for I/O we do this:


SystemCoreClockUpdate();
Board_Init();

LPC_SYSCON->SYSAHBCLKCTRL |= 1<<7;//enable SWM
LPC_SWM->PINENABLE0 |= (1<<5);//P0.9 is a gpio pin
LPC_SWM->PINENABLE0 |= (1<<4);//P0.8 is a gpio pin
LPC_SYSCON->SYSAHBCLKCTRL |= 1<<18;// enable iocon
LPC_IOCON->PIO0[7] |= (1UL<<8);// no i2c, use pio0_11 as gpio
LPC_IOCON->PIO0[12] |= (1UL<<10);// use pio0_9 as gpio
LPC_IOCON->PIO0[13] |= (1UL<<10);// use pio0_8 as gpio

Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, 0, 8);
Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, 0, 9);
Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, 0, 11);

Chip_GPIO_SetPinState(LPC_GPIO_PORT, 0, 8, true);
Chip_GPIO_SetPinState(LPC_GPIO_PORT, 0, 9, true);
Chip_GPIO_SetPinState(LPC_GPIO_PORT, 0, 11, true);

Chip_GPIO_SetPinState(LPC_GPIO_PORT, 0, 8, false);
Chip_GPIO_SetPinState(LPC_GPIO_PORT, 0, 9, false);
Chip_GPIO_SetPinState(LPC_GPIO_PORT, 0, 11, false);

We see 11 change logic states on the board, but see no change in 8 or 9.  PINENABLE, DIR0 ports look like they have the right values. Mask is 0.

Watching PIN0 reg, we see pin changing states but can't see any logic level changes on the breakout with an oscilloscope.  What's going on here?

Thanks,

EC

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