Ethernet failed !, Anyone faced this?

lpcware · ‎06-15-2016

Content originally posted in LPCWare by karuna on Wed Aug 22 09:57:37 MST 2012
Hi,

I am using LPC1769 with PHY LAN8720. I have been using uip socket in my application, the code was tested and working fine in our custom designed board. But many boards fail to work after few months, for the same code. It seems PHY failed. But still have doubt about MAC part in LPC1769.

While executing EMAC_init() and stepping in using debugger I could observe the following.

1. Ethernet Power is enabled
2. PINSEL2, 3 registers are configured to ENET funtions only.
3. No problem with Reset commands for all EMAC internal modules.
3. On initializing MAC1 register, I get this error

    [COLOR=Red]"Target reported errors
     Reason 15: target error from register access[/COLOR]"

4. Also when I try to access peripheral memory for ENET, I am getting

    [COLOR=Red]"Error reading power down
     Reason: (EM11).cannot complete transaction even after slowing speed"[/COLOR]

    This error is thrown write after the power bit for ethernet is ON. Otherwise it shows Ethernet power/clock disabled.

5. If I continue without break point I get,

        "stalled on bus operation" and I could not stop the controller until power oat could be the reason
Where is the problem? PHY/MAC ? please help..

lpcware · ‎06-15-2016

Content originally posted in LPCWare by sanders on Mon Aug 26 10:14:21 MST 2013
You should check wether the phy supplies a good clock, see the remark in this part of the UM:

10.16.1 Overview
The Ethernet block can transmit and receive Ethernet packets from an off-chip Ethernet
PHY connected through the RMII interface.
Typically during system start-up, the Ethernet block will be initialized. Software
initialization of the Ethernet block should include initialization of the descriptor and status
arrays as well as the receiver fragment buffers.
Remark: when initializing the Ethernet block, it is important to first configure the PHY and
insure that reference clocks (ENET_REF_CLK signal in RMII mode, or both
ENET_RX_CLK and ENET_TX_CLK signals in MII mode) are present at the external pins
and connected to the EMAC module (selecting the appropriate pins using the PINSEL
registers) prior to continuing with Ethernet configuration. Otherwise the CPU can become
locked and no further functionality will be possible. This will cause JTAG lose
communication with the target, if debug mode is being used.

lpcware · ‎06-15-2016

Content originally posted in LPCWare by shweta.kosamkar on Mon Aug 26 04:20:06 MST 2013
Hi,

         I am facing the same issue. But we already changed the PHY chip. One more observation is that the phy chip is generating the 50MHz clock, but in reset condition means if we make the reset pin low i.e controller and other peripheral ICs in reset then only it is clocking out the signal. in normal mode it is high. I am not understanding its erratic behavior.
         Can anybody help me on it?
         Thanks in advance

With Regrds,
Shweta

lpcware · ‎06-15-2016

Content originally posted in LPCWare by Ex-Zero on Sat Aug 25 05:14:28 MST 2012

Quote:

Please tell me what may be the cause for failure of PHY..

Quote:

...custom designed board....

If several boards are failing it's time to ask that your hardware engineer ;)

lpcware · ‎06-15-2016

Content originally posted in LPCWare by karuna on Sat Aug 25 05:05:46 MST 2012
I increased the delay counter. but no use. If I write reset bit in register-0 of PHY, It never clears it to zero. I increased the counter value to increase number of read for reg-0, but still it replies with 0xFFFF. So considered it never getting reset..

Now I replaced LAN8720 IC with new one, and it started working, but not sure how long it will work...

Please tell me what may be the cause for failure of PHY..

lpcware · ‎06-15-2016

Content originally posted in LPCWare by Ex-Zero on Thu Aug 23 02:24:13 MST 2012
So did you check your hardware already? Power supply? PHY clock?

What's happening after increasing delay counter?

What's happening after writing something different (0 or loopback) to MAC1?

lpcware · ‎06-15-2016

Content originally posted in LPCWare by karuna on Thu Aug 23 02:05:40 MST 2012
Ethernet MAC fails to work and controller hangs after initializing MAC. Now I am not using debugger just blinking LED to check if the code is running in while(1) loop. But it is not blinking with the Ethernet initialization part uncommented.

For checking hardware, I am using telnet client application and also trying to ping. Controller hangs at the EMAC_init() function itself..

// clock init
clock_init();
LCD_init();
// two timers for tcp/ip
timer_set(&periodic_timer, CLOCK_SECOND / 2); /* 0.5s */
timer_set(&arp_timer, CLOCK_SECOND * 10);/* 10s */
// ethernet init
EMAC_init(); [COLOR=Red]//controller hangs after this function[/COLOR]

// Initialize the uIP TCP/IP stack.
uip_init();

uip_ipaddr(ipaddr, MYIP_1,MYIP_2,MYIP_3,MYIP_4);
uip_sethostaddr(ipaddr);/* host IP address */
uip_ipaddr(ipaddr, MYIP_1,MYIP_2,MYIP_3,1);
uip_setdraddr(ipaddr);/* router IP address */
uip_ipaddr(ipaddr, 255,255,255,0);
uip_setnetmask(ipaddr);/* mask */

struct uip_conn *con1;
uip_ipaddr(ipaddr, 192,168,1,8);
con1 = uip_connect(&ipaddr,HTONS(23));


while(1)
{
                    //LED blink
LPC_GPIO2->FIOSET |= (1<<12);
delay_ms(1000);
LPC_GPIO2->FIOCLR |= (1<<12);
delay_ms(1000);

//Ethernet routine
...


}

In EMAC_init() function controller hangs after the for loop

/* Power Up the EMAC controller. */
   LPC_SC->PCONP |= 0x40000000;

   /* Enable P1 Ethernet Pins. */
   LPC_PINCON->PINSEL2 = 0x50150105;
   LPC_PINCON->PINSEL3 = (LPC_PINCON->PINSEL3 & ~0x0000000F) | 0x00000005;

  /* Reset all EMAC internal modules. */
   LPC_EMAC->MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX |
             MAC1_SIM_RES | MAC1_SOFT_RES;
   LPC_EMAC->Command = CR_REG_RES | CR_TX_RES | CR_RX_RES | CR_PASS_RUNT_FRM;

  /* A short delay after reset. */
  for (tout = 100; tout; tout--);

  /* Initialize MAC control registers. */
  LPC_EMAC->MAC1 = MAC1_PASS_ALL; [COLOR=Red]//controller hangs here[/COLOR]
  LPC_EMAC->MAC2 = MAC2_CRC_EN | MAC2_PAD_EN;
  LPC_EMAC->MAXF = ETH_MAX_FLEN;
  LPC_EMAC->CLRT = CLRT_DEF;
  LPC_EMAC->IPGR = IPGR_DEF;

lpcware · ‎06-15-2016

Content originally posted in LPCWare by Ex-Zero on Wed Aug 22 10:17:07 MST 2012

Quote: jhn
But many boards fail to work after few months...

So what's failing there :confused:

What's your code doing :confused:

Debugging is a bad idea there, PHY inits are time dependant :eek:

So start with using a timer and a few flags to understand where your code is failing ;)