Seeting pin for interrupt - edge rising

[lpcware]

Content originally posted in LPCWare by aamir ali on Tue Jan 15 22:18:48 MST 2013
I have to configure pin for resing edge interrupt. What should be setting of the pin:

1. Pin as input & internal pull down
2. Pin as input & internal repeater
3. Pin as input with no internal resistance

1. Now if I configure with internal pull down, when int will come, pin will get high. Int signal come from output from opamp & a 10K resistance in b/w pin.
So when int came won't it form a voltage divider b/w 10K resistance & internal pull down resistor.
Yes the 10K is small but I want to know.

2. Edit: Also if I configure in repeater mode, initillay pin is at high state. Won't it create problem in low to high detection as pin is already in high stae How will low to high signal will come

[lpcware]

Content originally posted in LPCWare by karanmehta93 on Tue Jan 22 07:40:24 MST 2013
I am sorry for my misinterpretation.

[lpcware]

Content originally posted in LPCWare by MikeSimmonds on Mon Jan 21 15:35:18 MST 2013
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Quote: karanmehta93
The purpose of my post was to tell that irrespective of pull up or pull down on any GPIO pin both the interrupts can be triggered. I have already tried this and this has nothing to do with what you are saying.

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Apparently, you took my post as directed to you; appologies for not being clearer, but it was meant for the original poster.
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[lpcware]

Content originally posted in LPCWare by karanmehta93 on Mon Jan 21 13:11:48 MST 2013
The purpose of my post was to tell that irrespective of pull up or pull down on any GPIO pin both the interrupts can be triggered. I have already tried this and this has nothing to do with what you are saying.

[lpcware]

Content originally posted in LPCWare by MikeSimmonds on Mon Jan 21 04:17:00 MST 2013
[FONT=Tahoma][SIZE=1]On the[/SIZE][/FONT][FONT=Tahoma][SIZE=1] 1778 which I use, only port 0 and port 2 pins can generate interrupts.

You must also power the GPIO in the PCONP register

Secondly, there are extra registers in the GPIO area to enable rising, to enable falling
edges. (and a bunch of others for checking and clearing the interrupt rq's.)

Also have you enable the interrupt(s) in the NVIC?
Amd setup a handler?

Note there is only a SINGLE interrupt vector for all GPIO interrupts -- you have to poll
the status bits in the regs (above) to see which pin/edge occured -- and clear it so it can be detected again.

If you use a different chip, read it's UM to get restrictions, and register descriptions.

BTW you really (really) must read (and re-read, re-read) your UM and research you requirements BEFORE posting.
If (after proper reasearch) you are still uncertain, why then it is appropriate and acceptable to post.

Mike




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[lpcware]

Content originally posted in LPCWare by karanmehta93 on Sat Jan 19 14:36:56 MST 2013
Internal Pull up or Pull down is used just to prevent floating value on a pin. If you give high voltage, irrespective of pin being configured as pull up or pull down it will give high only.pull up is usually used with open collector outputs as they can only tie to ground,