BUG UART1 IOCON_112x.h lpcopen_2_17_keil_iar_nxp_lpcxpresso_1125

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BUG UART1 IOCON_112x.h lpcopen_2_17_keil_iar_nxp_lpcxpresso_1125

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by ybouchet on Thu Jul 23 04:16:55 MST 2015
Hi,
i started to work with a lpc1124 and need to use uart0 and uart1.
I begin my work based on the uart example of lpcopen.
to use uart1 on PIO0_6 and PIO0_7 i used the function:
Chip_IOCON_PinMuxSet(LPC_IOCON, IOCON_PIO0_6, (IOCON_FUNC3 | IOCON_MODE_INACT ));/* TXD */
Chip_IOCON_PinMuxSet(LPC_IOCON, IOCON_PIO0_7, (IOCON_FUNC3 | IOCON_MODE_INACT ));/* RXD */
My uart1 dosen't work.
After controle all registers, look what i saw:
&LPC_IOCON->REG[IOCON_PIO0_6]: 0x4004404c 0010 0000 0000 0010 0010 0000 0010 0011 <CR><LF>
&LPC_IOCON->REG[IOCON_PIO0_7]: 0x40044050 0010 0000 0000 0010 0010 0000 1010 0000 <CR><LF>
0x4004404c and 0x40044050 was wrong adresses (Bug on the lpcopen project).

After setting the port like that:
  //PIO0_6, address 0x4004 40C4
  *((uint32_t *)0x400440C4) = (IOCON_FUNC3 | IOCON_MODE_INACT );
 
  //PIO0_7, address 0x4004 40C8
  *((uint32_t *)0x400440C8) = (IOCON_FUNC3 | IOCON_MODE_INACT );
It also work fine.

Do i miss something or do something wrong????
Is it just a bug?

Thank you for your reply.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by dnsc4f@mst.edu on Mon Aug 17 06:48:04 MST 2015
I am attaching my corrected iocon_112x.h file and corrected clock_112x.h file.  Ideally, NXP support will verify these.


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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by MNRuS on Fri Jul 24 01:00:28 MST 2015
Hi,ybouchet
I'm not good at English. Please forgive me even if there is a rude representation.

I am using the LPCexpresso version, but there was a similar problem.
I think that there are some problems in iocon_112x.h.

typedef enum CHIP_IOCON_PIO {
    :
  IOCON_PIO0_3 = ([color=#f00]0x02C[/color] >> 2), <-- This error,  ([color=#f00]0x0c0[/color] >> 2) is correct.
    :
  IOCON_PIO0_6 = ([color=#f00]0x04C[/color] >> 2), <-- ([color=#f00]0x0c4[/color] >> 2)
  IOCON_PIO0_7 = ([color=#f00]0x050[/color] >> 2), <-- ([color=#f00]0x0c8[/color] >> 2)
    :
  IOCON_PIO1_8 = ([color=#f00]0x014[/color] >> 2), <-- ([color=#f00]0x018[/color] >> 2)
    :
} CHIP_IOCON_PIO_T;



typedef enum CHIP_IOCON_PINLOC {
    :
  IOCON_SSEL1_LOC_[color=#f00]PIO2_2[/color] = ([color=#f00]0x18[/color]), <-- This error
  IOCON_SSEL1_LOC_[color=#f00]PIO2_0[/color] = ([color=#f00]0xcc[/color]), <-- is correct.
  IOCON_SSEL1_LOC_PIO2_4 = ([color=#f00]0x18[/color] | 1), <-- ([color=#f00]0xcc[/color] | 1)
    :
  IOCON_CT16B0_CAP0_LOC_PIO0_2 = ([color=#f00]0xC0[/color]), <-- ([color=#f00]0xd0[/color])
  IOCON_CT16B0_CAP0_LOC_PIO3_3 = ([color=#f00]0xC0[/color] | 1), <-- ([color=#f00]0xd0[/color] | 1)
    :
  IOCON_SCK1_LOC_PIO2_1 = ([color=#f00]0xC4[/color]), <-- ([color=#f00]0xd4[/color])
  IOCON_SCK1_LOC_PIO3_2 = ([color=#f00]0xC4[/color] | 1), <-- ([color=#f00]0xd4[/color] | 1)
    :
  IOCON_MOSI1_LOC_PIO2_2 = ([color=#f00]0xC8[/color]), <-- ([color=#f00]0xd8[/color])
  IOCON_MOSI1_LOC_PIO1_10 = ([color=#f00]0xC8[/color] | 1), <-- ([color=#f00]0xd8[/color] | 1)
    :
  IOCON_CT32B0_CAP0_LOC_PIO1_5 = ([color=#f00]0xD0[/color]), <-- ([color=#f00]0xe0[/color])
  IOCON_CT32B0_CAP0_LOC_PIO2_9 = ([color=#f00]0xD0[/color] | 1), <-- ([color=#f00]0xe0[/color] | 1)
    :
  IOCON_U0_RXD_LOC_PIO1_6 = ([color=#f00]0xD4[/color]), <-- ([color=#f00]0xe4[/color])
  IOCON_U0_RXD_LOC_PIO2_7 = ([color=#f00]0xD4[/color] | 1), <-- ([color=#f00]0xe4[/color] | 1)
  IOCON_U0_RXD_LOC_PIO3_4 = ([color=#f00]0xD4[/color] | 3), <-- ([color=#f00]0xe4[/color] | 3)
    :
} CHIP_IOCON_PIN_LOC_T;

I found the problem is over.
In these modifications, my board was working properly.
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