Bug in Chip_ClockDisablePeriphClock of the 176x/5x library and Chip_SetBaudFDR of LPC18xx

Discussion created by lpcware Employee on Jun 15, 2016
Content originally posted in LPCWare by rhoukes on Fri Jan 09 04:41:52 MST 2015
Whilst working using the LCP1763 and LPC1812 and using the LCPOpen library, I ran in the following bugs.

For the LCPOpen library latest version for the LPC176/x5x the Chip_ClockDisablePeriphClock does not disable the clock for the perphiral, instead it enabled all the remainder perphirals.
The disable code reads: LPC_SYSCTL->PCONP |= ~(1 << bs) which I think should read LPC_SYSCTL->PCONP &= ~(1 << bs)

The Chip_SetBaudFDR of the LPC18xx LPCOpen library seems to derive its value from the main core clock and not that of the U(S)ARTn perhipheral clock itself. Which means that if the clock of the main core and the U(S)ART are different, SetBaudFDR won't calcute the correct values as it gets the wrong clock.