lpcware

LPC11c24: No PWM signal on PIO0_11(MAT3)

Discussion created by lpcware Employee on Jun 15, 2016
Content originally posted in LPCWare by hetii on Sat Jun 14 13:47:22 MST 2014
Hi there :>
I have such code:
When I use MR2 for timer reset and MAT3 as PWM output, then get pwm signal just for pin MAT0,1.
I check PWMC register and all bits for MAT0,1,3 are set to PWM_MODE_IS_ENABLED.


int pr = SystemCoreClock / (4 * 1000000) - 1;
Chip_IOCON_PinMuxSet(LPC_IOCON, IOCON_PIO1_6, (IOCON_FUNC2 | IOCON_MODE_PULLUP));  //MAT0
Chip_IOCON_PinMuxSet(LPC_IOCON, IOCON_PIO1_7, (IOCON_FUNC2 | IOCON_MODE_PULLUP));  //MAT1
Chip_IOCON_PinMuxSet(LPC_IOCON, IOCON_PIO0_11, (IOCON_FUNC2 | IOCON_MODE_PULLUP)); //MAT3
// Initialize timers.
Chip_TIMER_Init(LPC_TIMER32_0);

// Configure Prescale
Chip_TIMER_PrescaleSet(LPC_TIMER32_0, pr);       //PR  = 11
Chip_TIMER_ResetOnMatchEnable(LPC_TIMER32_0, 2); //MCR = Reset on MR2
Chip_TIMER_SetMatch(LPC_TIMER32_0, 2, 255);      //MR2 = Period 255uS

Chip_TIMER_SetMatch(LPC_TIMER32_0, 0, 1);        //MR0 = Duty cycles  set on 0
Chip_TIMER_SetMatch(LPC_TIMER32_0, 1, 1);        //MR1 = Duty cycles  set on 1
Chip_TIMER_SetMatch(LPC_TIMER32_0, 3, 1);        //MR3 = Duty cycles  set on 3

Chip_TIMER_CountWrite(LPC_TIMER32_0, (1<<0)|(1<<1)|(1<<3));    //PWMC - enable PWM signal on MAT0, MAT1, MAT3
Chip_TIMER_Enable(LPC_TIMER32_0);


I also try use below code where I use MR3 for timer reset and MAT2 as output and then have all PWM signals.

int pr = SystemCoreClock / (4 * 1000000) - 1;
Chip_IOCON_PinMuxSet(LPC_IOCON, IOCON_PIO1_6, (IOCON_FUNC2 | IOCON_MODE_PULLUP));  //MAT0
Chip_IOCON_PinMuxSet(LPC_IOCON, IOCON_PIO1_7, (IOCON_FUNC2 | IOCON_MODE_PULLUP));  //MAT1
//Chip_IOCON_PinMuxSet(LPC_IOCON, IOCON_PIO0_11, (IOCON_FUNC2 | IOCON_MODE_PULLUP)); //MAT3
Chip_IOCON_PinMuxSet(LPC_IOCON, IOCON_PIO0_1, (IOCON_FUNC2 | IOCON_MODE_PULLUP));  //MAT2
// Initialize timers.
Chip_TIMER_Init(LPC_TIMER32_0);

// Configure Prescale
Chip_TIMER_PrescaleSet(LPC_TIMER32_0, pr);       //PR  = 11
Chip_TIMER_ResetOnMatchEnable(LPC_TIMER32_0, 3); //MCR = Reset on MR3
Chip_TIMER_SetMatch(LPC_TIMER32_0, 3, 255);      //MR3 = Period 255uS

Chip_TIMER_SetMatch(LPC_TIMER32_0, 0, 1);        //MR0 = Duty cycles  set on 1
Chip_TIMER_SetMatch(LPC_TIMER32_0, 1, 1);        //MR1 = Duty cycles  set on 1
Chip_TIMER_SetMatch(LPC_TIMER32_0, 2, 1);        //MR3 = Duty cycles  set on 1

Chip_TIMER_CountWrite(LPC_TIMER32_0, (1<<0)|(1<<1)|(1<<2));    //PWMC - enable PWM signal on MAT0, MAT1, MAT2
Chip_TIMER_Enable(LPC_TIMER32_0);          //TCR  - and run...

Could someone explain that?

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