Remark on SPI registers: TXDATCTL and TXCTL - bit EOT influences SCK to go idle

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by capiman on Tue Feb 19 07:04:34 MST 2013
I just tried SPI0 on LPC812. There is CPOL in CFG-Register. I have set it to 1. When enabling SPI0, SCK has the right level "high".
But after sending data, the SCK was not going back to right level (i had CPOL=1, it stayed "low").
After some tests i found out, that TXDATCTL and TXCTL have a bit called EOT (bit 20).
According to description in user manual of LPC800 (Rev. 1, from 12 November 2012 and also in rev 1.1 from 24 January 2013)
it only influences assertion/deassertion of SSEP. But in real life it also influences SCK going to idle.

@NXP: Perhaps a note for SCK can be added to the bit EOT in TXDATCTL and TXCTL in the next version of the User Manual of LPC800