[SCT] it is very difficult to function SCT as what I want

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by uratan on Wed Dec 10 04:50:16 MST 2014
Hi all.

SCT is very interesting peripheral but I can not make it work as what I want yet.
(I have similar problem as: http://www.lpcware.com/content/forum/sct-halt-problem-split-mode-different-prescalers)
I'm fighting to grasp SCT, but it is far from easy...


Is there some more detailed documents about SCT other than UM10601 ?
(for example, how does it act when STOP condition and START condition is conflicted)
(or why the counter never be HALTed when it is already STOPped)
(or why I can not get static comparison result with MATCHMEM attribute when starting the SCT with initial counter value)


I'm referencing "lpc_chip_8xx_lib/inc/sct_8xx.h" (from lpcopen_2_01_lpcxpresso_nxp_lpcxpresso_812.zip), and it
has these register difinitions which are not described in UM10601:

MATCH_L[n]    / CAP_L[n]     @ 0x5000_4180--
MATCH_H[n]    / CAP_H[n]     @ 0x5000_41c0--
MATCHREL_L[n] / CAPCTRL_L[n] @ 0x5000_4280--
MATCHREL_H[n] / CAPCTRL_H[n] @ 0x5000_42c0--

It seems that these are some alias for 16bit-mode access, and can work legally.
Is there any problem about using these registers ?



The UM10601 says that "The prescaler is cleared" when "Software writing to the counter register" (page 156 of 370, Rev.1.6),
but I can not get this action...