lpcware

Starting program execution from ISP while ISP entry pin is low

Discussion created by lpcware Employee on Jun 15, 2016
Content originally posted in LPCWare by nakedible on Wed Oct 16 08:18:18 MST 2013
Hello,

I wish to use LPC81x such that it would automatically enter ISP after every power-on, after which I could check if the software is correct and continue program execution. However, this seems to be increasingly difficult to do. I've tried many different methods to achieve this and none have been satisfactory. I'll try to list all the methods I have tried so far to see if anyone comes up with some new ones. But, first a little background.

The LPC81x processor is going to be connected to a device, which only has an RS-232 interface available for this. The RS-232 interface only contains pins TX, RX, RTS, CTS. This device is a full blown Linux, and is supposed to be able to upload new firmware to the LPC81x when needed. These devices might be deployed in thousands, so it is paramount that there are no failure modes which would require human interaction to fix. My plan is to have the RTS pin control power supply to the device, as this is probably the only reliable means of resetting the processor, as a faulty piece of code could easily disable the reset PIN or the microprocessor might have some sort of an internal lock-up. This leaves me with no pins to control the ISP entry. I would also like to avoid adding many components to my board - a couple simple and cheap components more is probably fine.

Attempts to enter normal code execution after ISP:

[list]
  [*]The obvious choice is "G 0 T" command from ISP. However, this merely reinvokes the ISP if the ISP entry pin is low. If, alternatively, the ISP entry pin is high and ISP is entered because the user code CRC is invalid, calling "G 0 T" still only reinvokes ISP as the user code is not valid.
  [*]I tried using "G" command to another entrypoint in the code. This seems to work somewhat, but the code execution starts directly from the ISP, meaning all the chip setup the ISP does is still active, such as UART. Since the setup the ISP does is not documented anywhere, it is hard to attempt to undo everything the ISP has done. Also this would require changing the VTOR register to point to another address, so it seems like a lot of code.
  [*]FlashMagic allows starting execution from an interrupt vector table at any address, but all it does is upload a piece of code that sets the stack pointer and jumps to the reset entrypoint. This obviously has all the problems as above.
  [*]The documentation says that the ISP entry pin is not checked if there is a watchdog reset. I tried uploading code that does causes a watchdog reset, but all that does is reinvoke the ISP. This is somewhat puzzling, as if the processor is booted with the ISP entry pin high, and the normal code executed causes a watchdog reset, this does not cause an entry to the ISP even if the ISP entry pin would be low at the time the watchdog reset is generated. It seems as if the ISP entry pin would be sampled at processor powerup time and this state would be remembered through all watchdog resets.
  [*]I tried setting SYSMEMREMAP to flash and causing a reset, and all sorts of different register settings. However, it seems that asking for a reset via SYSRESETREQ performs an external reset which cause the power on reset flags to be enabled and such.
  [*]I tried an external solution to the problem by tying the TX line to the ISP entry line as well. This way, if I send a break on the TX at the same time as I toggle the power, I should be able to control the entry to ISP. However, it seems that if a break is active when the ISP is entered, this messes up the auto baud routine and I can not get the ISP to answer after that. There is probably a time window between when the ISP entry pin is sampled and the UART autobaud routines start, but I would rather not rely on such tight timing.
[/list]

Things that will probably work, but I don't consider them terribly good solutions:

[list]
  [*]I can add a 555 timer that will keep the ISP entry line low only on power on reset for some time. This way the ISP is only entered on a real power on triggered by RTS line.
  [*]I can probably add a flip-flop to the RTS line which will cycle between ISP entry and power states.
  [*]I can probably continue execution after ISP if I just create code that resets all peripherals and set everything to boot time values manually. Maybe some cool guy from the forums can help me with that.
[/list]

So, this is where I am at right now. If anyone has any good ideas, I would very much like to hear them.

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