Some errors/remarks in/for User Manual LPC800 Rev. 1.1 - 24 January 2013, Request for AppNote, ErrataSheet available?

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by capiman on Sat Mar 09 03:18:44 MST 2013
Here are again some topics for user manual of LPC800 (based on rev. 1.1 - 24 January 2013):

1) There are 4 places on page 43 which mention GPREG4. But in table 42 on page 43, the GPREGx goes only from 0 to 3.

2) Registers from Cortex-M0+ itself (e.g. SCB registers like SCR, but also NVIC register like ISER or ICER)
are not described in user manual of LPC800. Would it be possible to describe all registers
which are available in LPC800? Otherwise one must look into different sources (e.g. ARM website to collect the information needed)...
And there is still the unsecurity that register / functionality / certain bits are perhaps not even implemented in LPC800,
because they are optional.

3) Device ID register returns values which are not equal to values mentioned in user manual:
In real device i get:
In user manual the following values are listed:
0x0000 8100 = LPC810M021FN8
0x0000 8110 = LPC811M001FDH16
0x0000 8120 = LPC812M101FDH16
0x0000 8121 = LPC812M101FD20
0x0000 8122 = LPC812M101FDH20 (via ISP i get value 0x00008122)

There is a "8122" in above number, perhaps only 16 bit and bit range wrong?

BTW: My LPC812 chip has bootloader version 13.1 (according to FlashMagic)

4) I would be happy if there is an AppNote for Deep Power Down mode for the Cortex-M0+ LPC800...

5) Is there already an ErrataSheet for the LPC800? I have not found one...

6) I am currently trying to use Deep Power Down mode and wake up via WKT.
This works once, but not a second time. Is there something known not to be working or needed a workaround?
I write a separate entry, with more details inside.