Content originally posted in LPCWare by lpc_bloke on Wed Jul 16 04:54:50 MST 2014
Jorge,
I have just finish something like this and the only gotcha I can think of is that the TXDIS interrupt looks to happen when the byte is transferred from the TX holding register to the transmit shift register. I was surprised at this behavior as I would have expected the interrupt to happen when the stop bit of the last byte in the tx shift register is sent AND the tx holding register is empty. I have not bothered raising the issue as a timeout work around was fine for my application.
This meant I had started a timer when finished sending the data until the data had left the uC. Otherwise for me toggling the data direction pin would cut off the last bits of the last byte. For me this turn around time is only somewhat critical (>100uS).
Regards,
Rod Boyce
