lpcware

lpc13xx

Discussion created by lpcware Employee on Jun 15, 2016
Content originally posted in LPCWare by wellsk on Fri May 20 13:15:57 MST 2011
<h2 class="h2off" title="Back to top">Introduction</h2>
<div class="indent">
<table class="widthindent">
<tbody>
<tr>
<td class="middle" width="180"><span class="inline inline-left"><img class="image image-preview " src="http://www.lpcware.com/system/files/images/LPC1347%20block%20diagram.preview.png" border="0" alt="" title="" width="505" height="640" /></span></td>
<td width="10"> </td>
<td class="middle">
<h3> </h3>
</td>
</tr>
</tbody>
</table>
</div>
<div class="indent">The LPC13xx devices are ARM Cortex-M3-based microcontrollers for embedded applications featuring a high level of integration and low power consumption. The ARM Cortex-M3 is a next generation core that offers system enhancements such as enhanced debug features and a higher level of support block integration.</div>
<div class="indent">The LPC13xx devices operate at CPU frequencies of up to 72MHz. The ARM Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals. The ARM Cortex-M3 CPU also includes an internal prefetch unit that supports speculative branching.</div>
<div class="indent">The peripheral complement of the LPC13xx includes up to 32KB of flash memory, up to 8KB of data memory, USB Device (LPC134x only), one Fast-mode plus (Fm+) I<sup>2</sup>C interface, one UART, four general purpose timers, and up to 42 general purpose I/O pins.  </div>

Outcomes