lpcware

lpc2000

Discussion created by lpcware Employee on Jun 15, 2016
Content originally posted in LPCWare by wellsk on Fri May 20 09:53:04 MST 2011
<h2>Introduction</h2>

<span class="inline inline-left"><img class="image image-preview " src="http://www.lpcware.com/system/files/images/LPC2460_block_diagram_NXP-website.preview.gif" border="0" alt="" title="" width="554" height="640" /></span>


<span style="color: #313233; font-family: Arial; font-size: 12px; line-height: 17px;">NXP Semiconductor designed the LPC2400 microcontrollers around the ARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG and embedded Trace. The LPC2400 microcontrollers have 512 kB of on-chip high-speed Flash memory. This Flash memory includes a special 128-bit wide memory interface and accelerator architecture that enables the CPU to execute sequential instructions from Flash memory at the maximum 72 MHz system clock rate. This feature is available only on the LPC2000 ARM Microcontroller family of products. The LPC2400 can execute both 32-bit ARM and 16-bit Thumb instructions. Support for the two Instruction Sets means engineers can choose to optimize their application for either performance or code size at the sub-routine level.</span>

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