Pinout

[lpcware]

Content originally posted in LPCWare by IanB on Tue Apr 01 13:46:49 MST 2014
Does anyone know if there is a good reason why the pinout of the LPC1200 devices is entirely logical, but the pin allocations on LPC1100 devices appear to have been scattered completely randomly around the device?

For instance, I would have thought that all the SPI outputs would be in the same area of the silicon, but the pinouts are on pins 2, 13, 26 and 38; whereas on the LPC1200 they are on 14, 15, 16 and 17. Generally, all the tracks from the SPI pins head off in the same direction, so why are the pins all-over-the-place?

[lpcware]

Content originally posted in LPCWare by 010hnoor on Thu May 14 03:00:24 MST 2015
I would have thought that all the SPI outputs would be in the same area of the silicon, but the pinouts are on pins 2, 13, 26 and 38; whereas on the LPC1200 they are on 14, 15, 16 and 17.

[lpcware]

Content originally posted in LPCWare by xianghuiwang on Thu Apr 10 10:33:00 MST 2014
Hi, Lan,
Several reasons behind this:
1. avoid assigning multiple major functionalities on the same pin
2. avoid muxing too many functionalities on the same pin
3. in the case there are more of the same serial ports, it is likely one port has to scarify the allocation to allow other functionalities more conveniently allocated.

All of these decisions are to target a better application experience. Hope the length match is not too big of an issue given the flexibility in PCB routing.
Regards,

[lpcware]

Content originally posted in LPCWare by xianghuiwang on Fri Apr 04 17:19:23 MST 2014
Hi, Lan,

This is very good question. We are querying design for the background of the pin layout - especially the LPC1100.

Regards,