Content originally posted in LPCWare by R2D2 on Wed Dec 18 00:46:00 MST 2013
Quote: marcossmart
The maximum value of 25MHz crystal is supported?
Quote:
• Clock generation:
– 12 MHz internal RC oscillator trimmed to 1% accuracy that can optionally be used as a system clock.
– Crystal oscillator with an operating [color=#f00]range of 1 MHz to 25 MHz.[/color]
Quote: marcossmart
Only need to change the SYSPLLCTRL?
Yes.
Quote: marcossmart
What would be the correct value to operate and 50MHZ and 25MHz crystal?
Quote:
3.11.4.1 Normal mode
In normal mode the post divider is enabled, giving a 50% duty cycle clock with the
following frequency relations:
(1)
To select the appropriate values for M and P, it is recommended to [color=#f00]follow these steps[/color]:
1. Specify the input clock frequency FCLKIN.
2. Calculate M to obtain the desired output frequency FCLKOUT with
M = FCLKOUT / FCLKIN.
3. Find a value so that FCCO = 2 x P x FCLKOUT.
4. Verify that all frequencies and divider values conform to the limits specified in
Table 10.
5. Ensure that FCLKOUT < 100 MHz.
Wow, that's really difficult for 25 MHz:
-1. FCLKIN = 25 MHz
-2. M = FCLKOUT / FCLKIN = 50 MHz / 25 MHz = 2
-3. P = 2, FCCO = 2 x 2 x FCLKOUT = 200 MHz
-4: 156 MHz < 200MHz < 320 MHz
