lpcware

LPC11C24 can't receive message

Discussion created by lpcware Employee on Jun 15, 2016
Content originally posted in LPCWare by Novice on Thu Oct 10 22:27:06 MST 2013
hello,
 
everybody ,Now,i get some trouble .i use lpc11c24 and lpc4078 to communicate with CAN, My problem is lpc4078 can rightly received message by ISR, but lpc11c24 can't receive message .I am not use CANOPEN . The qusetion is  RXOK flag of LPC_CAN->STAT register bit is set,but the INT register is not right(always 0x0000 or 0x8000). if i disable the SIE of CANCNTL register ,the can't enter the interrupt(ISR ).

I think some of register are not setting right,but i can't find it.and also , how to set the basic mode exception the CANTEST register.If i use IF2 interface to receive message ,the following register setting is enough? this project is based on LPC11C14. I hope anybody can resolve my question.thanks very much.
best regards!


//////////////////////////////////////////////////////////////Init///////////////////////////////////////
void CAN_Init( uint32_t CANBitClk )
{
  LPC_SYSCON->PRESETCTRL |= (0x1<<3);
  LPC_SYSCON->SYSAHBCLKCTRL |= (1<<17);

  /* The USB D- and CAN RX share the dedicated pin. The USB D+
  and CAN TX share the dedicated pin. so, no IO configuration is
  needed for CAN. */
  if ( !(LPC_CAN->CNTL & CTRL_INIT) )
  {
/* If it's in normal operation already, stop it, reconfigure
everything first, then restart. */
LPC_CAN->CNTL |= CTRL_INIT;/* Default state */
  }

#if USE_DEFAULT_BIT_TIMING
  /* AHB clock is 48Mhz. The CAN clock divider is within CAN block,
  set it to 8Mhz for now. Thus, default bit timing doesn't need to
  be touched. */
  LPC_CAN->CLKDIV = 0x05;/* Divided by 6 */
   /* Start configuring bit timing */
  LPC_CAN->CNTL |= CTRL_CCE;
  //LPC_CAN->BT = 0x2301;
LPC_CAN->BT = BITRATE250K8MHZ;            //250K 8M
  LPC_CAN->BRPE = 0x0000;
  /* Stop configuring bit timing */
  LPC_CAN->CNTL &= ~CTRL_CCE;
#else
  /* Be very careful with this setting because it's related to
  the input bitclock setting value in CANBitClk. */
  /* popular CAN clock setting assuming AHB clock is 48Mhz:
  CLKDIV = 1, CAN clock is 48Mhz/2 = 24Mhz
  CLKDIV = 2, CAN clock is 48Mhz/3 = 16Mhz
  CLKDIV = 3, CAN clock is 48Mhz/4 = 12Mhz
  CLKDIV = 5, CAN clock is 48Mhz/6 = 8Mhz */

  /* AHB clock is 48Mhz, the CAN clock is 1/6 AHB clock = 8Mhz */
  LPC_CAN->CLKDIV = 0x05;/* Divided by 6 */
 
  /* Start configuring bit timing */
  LPC_CAN->CNTL |= CTRL_CCE;
  LPC_CAN->BT = CANBitClk;
  LPC_CAN->BRPE = 0x0000;
  /* Stop configuring bit timing */
  LPC_CAN->CNTL &= ~CTRL_CCE;
#endif

  /* Initialization finishes, normal operation now. */
  LPC_CAN->CNTL &= ~CTRL_INIT;
  while ( LPC_CAN->CNTL & CTRL_INIT );

#if (LOOPBACK_MODE | BASIC_MODE)
  //LPC_CAN->CNTL |= CTRL_TEST;
  LPC_CAN->TEST &= ~((0x1<<2)|(0x1<<3)|(0x1<<4));
#if LOOPBACK_MODE
  LPC_CAN->TEST |= (0x1<<4);
#endif
#if BASIC_MODE
// LPC_CAN->TEST |= (0x1<<2);
#endif
#endif 

#if !BASIC_MODE
  /* Below is a critical module to configure all the messages */
  /* It's organized in such a way that:
    obj(x+1)standardreceive
    obj(x+2)standardtransmit
    obj(x+3)extendedreceive
    obj(x+4)extendedtransmitwhere x is 0 to 7
    obj31 is not used.
obj32 is for remote date request test only */
  CAN_ConfigureMessages();
#endif
// CAN_ConfigureMessages();
#if !POLLING
  /* Enable the CAN Interrupt */
  NVIC_EnableIRQ(CAN_IRQn);
LPC_CAN->STAT = 0;                            /* reset CAN status register */
  /* By default, auto TX is enabled, enable all related interrupts */
   LPC_CAN->CNTL |= (CTRL_IE|CTRL_SIE|CTRL_EIE|CTRL_DAR);
  //LPC_CAN->CNTL |= (CTRL_IE|CTRL_EIE|CTRL_DAR);
LPC_CAN->IF2_MSK1 = 0X0000;
LPC_CAN->IF2_MSK2 = 0<<2;
LPC_CAN->IF2_ARB1 = 0X0000;
LPC_CAN->IF2_MCTRL |= RXIE|UMSK;
#endif
  return;
}



Original Attachment has been moved to: LPC11c24Proj_1.rar

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