Three PWMs from the same timer

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Three PWMs from the same timer

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by audriusmerfeldas on Sat Jan 16 16:33:14 MST 2016
Hi there,
I am trying to get 3 different PWM signals from the same timer, but there is a problem with timer match register 3. I am getting high level on Port2_8. Both mat0 and mat1 work perfer=ct


#include "LPC11xx.h"                        /* LPC11xx definitions */
#include "gpio.h"
#include <cr_section_macros.h>
#include <NXP/crp.h>

// Variable to store CRP value in. Will be placed automatically
// by the linker when "Enable Code Read Protect" selected.
// See crp.h header for more information
__CRP const unsigned int CRP_WORD = CRP_NO_CRP ;

int main(void)
{

 LPC_TMR32B0->TCR = 0; //Disable Timer0
 LPC_SYSCON->SYSAHBCLKCTRL |= (1<<9); // System AHB clock control enable clock to timer32 0
 LPC_TMR32B0->EMR = (1<<0)|(1<<1)|(1<<2)|(1<<3)|(1<<5)|(1<<7)|(1<<8)|(1<<11); // Setup the external match register (1<<0 : EM0 connected to pin) : 18.7.10 External Match Register
 // 1<<5 : Set the corresponding External Match bit/output to 1
 // 1<<10 : Clear the corresponding External Match bit/output to 0 (CT16Bn_MATm pin is LOW if pinned out : (1<<3).

 LPC_IOCON->PIO1_6 &= ~0x07; // Clears the FUNC bits : 8.4.23 IOCON_PIO1_6
 LPC_IOCON->PIO1_6 |= 0x02; // Selects function CT32B0_MAT0. PIO1_6
 LPC_IOCON->PIO1_7 &= ~0x07; // Clears the FUNC bits : 8.4.24 IOCON_PIO1_7
 LPC_IOCON->PIO1_7 |= 0x02; // Selects function CT32B0_MAT1. PIO1_7
 LPC_IOCON->PIO2_8 &= ~0x07; // Clears the FUNC bits : 8.4.24 IOCON_PIO1_7
 LPC_IOCON->PIO2_8 |= 0x02; // Selects function CT32B0_MAT1. PIO1_7

 // These are compared against the TC ( Timer Counter )
 LPC_TMR32B0->MR2 = 1000-1; // Setup the match registers
 LPC_TMR32B0->MR0 = 500; // Match Register 0 - PWM1 value
 LPC_TMR32B0->MR1 = 500; //PWM2 value
 LPC_TMR32B0->MR3 = 500; //PWM3 value
 LPC_TMR32B0->MCR = 1<<7; // OK : Match Control Register : 1<<7 = Reset on MR2
 // If needed : 1<<9 = Interrupt on MR3: an interrupt is generated when MR3 matches the value in the TC.
 LPC_TMR32B0->PWMC = 0b1111; // OK : PWM Control Register to enable the selected PWMs
 // 0x01 : PWM mode is enabled for CT32Bn_MAT0
 // 0x02 : PWM mode is enabled for CT32Bn_MAT1
 // 0x04 : PWM mode is enabled for CT32Bn_MAT2
 // 0x08 : PWM mode is enabled for match channel 3

 NVIC_EnableIRQ(TIMER_32_0_IRQn); // Enable the TIMER1 Interrupt
 LPC_TMR32B0->TCR = 1; // Enable Timer16

 while(1)
 {
 }

}

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by audriusmerfeldas on Sun Jan 17 02:50:28 MST 2016
Waw thanks a lot mate. Havent noticed that for this pin I need to set 0x1. You have saved the day. Thanks
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by R2D2 on Sat Jan 16 17:21:09 MST 2016

Quote: audriusmerfeldas
...but there is a problem with timer match register 3. I am getting high level on Port2_8.



:quest:

Then use LPC_IOCON->PIO2_8 setup for CT32B0_MAT3  :O
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