Content originally posted in LPCWare by embd02161991 on Thu Feb 13 03:42:08 MST 2014
Hi,
The THR indicates the Transmitter Holding Register. It contains the next character to be transmitted. The TSR is a Transmitter Shift Register, which is a shadow register and reads from THR and is assembled to be transmitted via the physical interface. The THRE bit is set, when the THR register is empty. The TEMT bit is set when both the THR and TSR is empty. There could be a situation where the THR is empty but the TSR isn't . In which case , data is present in the shift register to be transmitted . This helps to identify the status of the UART interface.
Thanks,
NXP Technical Support