LPC1114 "flash write done" hang

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

LPC1114 "flash write done" hang

484 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by fancypants on Fri Jul 26 13:05:59 MST 2013
Hi all

I have been using LPCXpresso on a custom target board (LPC1114 mcu) for a while now. I've got 2 target boards. They were both worked for a while, while connected to the LPC11U14 LPC-Link (i.e. could single step, set breakpoints, download debug code, etc.). Now, one board works, and the other doesn't. The one that doesn't work makes it to "Flash write done" when starting debugging but then just hangs, with "Launching app 97%" endlessly displayed in the bottom status bar. The other board continues to debug just fine.

I'm guessing that I've somehow damaged my hardware but I'm looking for any leads as to what/how/root cause. What would cause LPCXpresso to seemingly download code to the board but then not be able to go any further?

Any hints appreciated.
Labels (1)
0 Kudos
5 Replies

436 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by fancypants on Mon Aug 12 13:19:26 MST 2013
Tried an additional experiment to see if it actually is waiting for isp uart communication: sending "?" via uart. Got no response from the mcu.
0 Kudos

436 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by fancypants on Thu Aug 08 17:15:19 MST 2013
Thanks. Checked the info on that page. Didn't have the pull-up resistor on ISP (P0.1), was just going straight to 3.3V. Adding a 10K pull-up made no difference in operation though. Verified signals at the mcu.

Stopping and then single stepping it looks like it is in a loop at address 0x1fff0f60 (boot rom), which appears to be waiting for uart communication. Reading through manual it seems like this is expected when ISP/P0.1 is low. I've verified on the scope that ISP/P0.1 is high, and also that it is high when /RESET goes low->high. It also seems that the bootloader would wait for uart if the user code is determined to be invalid, which occurs if the word at 0x0000001C is not the 2's complement of the 7 words before it. Inspecting the flash memory in LPCXpresso and calculating the checksum indicates that it is valid.

So, seems like I'm a little bit closer to figuring out what is occurring - boot rom is waiting for uart communication - but why? Seems like P0.1 and the code are correct.
0 Kudos

436 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by lpcxpresso-support on Thu Aug 08 06:18:08 MST 2013
I would suggest that you check your debug related connections on the problem board/chip...

http://support.code-red-tech.com/CodeRedWiki/HardwareDebugConnections

In particular watch the ISP pin.

Regards,
LPCXpresso Support
0 Kudos

436 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by fancypants on Tue Aug 06 01:44:35 MST 2013
Thanks. Tried both methods but no luck.

After more experimenting (connecting via debug/swd to both units without programming first) it seems like the first 128 words of the bad unit's flash don't match the good unit (everything else matches), which implies that the system memory isn't being remapped. This appears to be the case: SYSMEMREMAP always = 0x0 on the bad unit, and = 0x2 on the good unit. I verified that the boot rom on both units match.

Seems like it isn't exiting the boot rom. Any ideas what would cause it to fail like this?
0 Kudos

436 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by lpcxpresso-support on Mon Jul 29 02:51:43 MST 2013
Try vector catch and/or Boot into ISP mode...
http://support.code-red-tech.com/CodeRedWiki/DebugAccessChip

Regards,
LPCXpresso Support

0 Kudos