Content originally posted in LPCWare by rui.araujo on Fri Jun 13 04:12:24 MST 2014
I want to implement semaphores between the two cores using the bit banding region and the AHB SRAM sections.
My implementation works fine on the M4 core but it hards fault while accessing the alias region on the M0.
is the M0 capable of bit banding on the LPC43xx?
If not, how should I implement semaphores between the two cores?