lpcware

problem with simple program with hsadc

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 18, 2016 by lpcware
Content originally posted in LPCWare by leform14 on Wed Apr 20 16:32:37 MST 2016
Hello all,

I am sur that someone have a solution for me, there is my problem :

I have to capture a signal (100 kHz on CTOUT_0) with hsadc at 1 Mhz, in order to do that I try a lot and a lot of things compare to examples and labtool but that still doesn't work.

I do this :

Configure clock for HSADC (verify by Chip_HSADC_GetBaseClockRate and with scope on CLK_BASE_OUT) : OK
Configure fifo size at 8 with packed value
Activate 8 descriptor from table 0
Configure trigger on rising edge of CTOUT_0
For descriptor 0 , set HSADC_DESC_BRANCH_NEXT | HSADC_DESC_MATCH(0x90)| HSADC_DESC_THRESH_NONE |HSADC_DESC_RESET_TIMER
For descriptor 1 to 6, set HSADC_DESC_BRANCH_NEXT | HSADC_DESC_MATCH(1)| HSADC_DESC_THRESH_NONE |HSADC_DESC_RESET_TIMER
For descriptor 7, set HSADC_DESC_HALT | HSADC_DESC_MATCH(1)| HSADC_DESC_THRESH_NONE |HSADC_DESC_RESET_TIMER
Enable interrupts HSADC_INT0_FIFO_FULL
Start by Chip_HSADC_SWTrigger

I simply retrieve first 16 samples (8 fifos with packed samples) and I see discontinuous values that doesn't match with 1 Mhz sampling rate instead of :

L L L L LL H H H H H H

Maybe the sens can be different but that must do this.

What I have is :

L L H H L L H H L L H H L L H H

Somebody sees something that I could have forgotten ?

Please help me, all needs can be helpful.

Best regards,

Mickael

Outcomes