Reset fails because chip not completely reset

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by samc77 on Sun Jul 20 23:57:30 MST 2014

we are using a LPC4330 and boot from SPIFI. We have also connected SDRAM.
The problem now is, that whenever the chips resets, no matter if intentional by RGU, by watchdog or by brownout: the periperals dont get reset.
That means, that the SCU, GPIO keep in their last state and that prevents the A9/P2_7/ISP pin from being high level on bootup.
Clearly, because the EMC is still in control of the pin, and depending what it currently does, the A9 line may be hi or lo.

For intentional reset and watchdog reset we already build a workaround and reset the GPIO+SCU manually.

But for a brownout reset, we would have to catch the BOD irq. We didnt manage to do that jet.

Still, this is a lot of workarounds for a problems thats basically in the chip, why doesnt it reset completely? How can we make it reset? I just found some snippets that its related to debug beeing enabled. But no information on how to disable debug for our configuration...

Hope anybody can help on this..