lpcware

OTP Issue with GP Word 0

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by ArriaLive on Mon Aug 03 20:12:59 MST 2015
First, I appreciate the help that so many provide on this forum!

I am working on a project that uses an LPC4330 processor.  We've been working with the processor for some time and have a great deal of experience and success with it.  However, I'm running into an issue with OTP that I need help with.

I am trying to write 3 words to the OTP.  I write two words (a MAC address) to the GP registers 1 and 2 (actually 6 bytes, so two bytes of GP register 1 are masked off).  This works great.

We have also set the boot code to boot from SPIFI.  That works great as well.

However, I then write a non-zero 32-bit code to GP register 0 (which is OTP bank 3, register 1), and the write fails.  The value always reads back as zero, suggesting that no fuses are blown, but the error code returned by the ROM API is 0x70002 which, according to the documentation means "ERR_OTP_SOME_BITS_ALREADY_PROGRAMMED."

So, OTP bank 3, registers 0, 2, and 3 work fine, but OTP bank3 register 1 (GP register 0) does not.

This has been repeated on 4 different processors with exactly the same results.

I have tried the OTP.1 recommended fix, but with no change in results.

Can someone shed light on why GP register 0 doesn't work and the others do?  Hopefully someone can help me figure out how to write to the GP register 0?

Thanks!

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