#define SDRAM_BASE_ADDR 0x28000000 EMCFlashInit(); vEMC_InitSRDRAM(SDRAM_BASE_ADDR, EMC_SDRAM_WIDTH_16_BITS, EMC_SDRAM_SIZE_16_MBITS, EMC_SDRAM_DATA_BUS_16_BITS, SDRAM_COL_ADDR_BITS); |
memcpy(vSDRAM,uacTest,128); unsigned char acRead[200]; memcpy(acRead,vSDRAM,128); |
memcpy(vSDRAM+128,uacTest,128); unsigned char acRead2[260]; memcpy(acRead2,vSDRAM+128,128); |
/* AS6C8016 SRAM Read Cycle Time 55 nS minimum Chip Enable Access Time 55 ns maximum Address Access Time 55 ns max Toe 30 ns max CE/OE high to inactive output 16 ns*/ /* Set up EMC Controller for CS0 */ LPC_EMC->CONTROL = 0x01; LPC_EMC->STATICCONFIG0 = (1<<7) | 1; LPC_EMC->STATICWAITRD0 = DELAYCYCLES(55)+1; LPC_EMC->STATICWAITPAG0 = DELAYCYCLES(55)+1; LPC_EMC->STATICWAITOEN0 = DELAYCYCLES(30)+1; LPC_EMC->STATICCONFIG0 |= 1 << 19; |
/* AS6C8016 SRAM Read Cycle Time 55 nS minimum Chip Enable Access Time 55 ns maximum Address Access Time 55 ns max Toe 30 ns max CE/OE high to inactive output 16 ns*/ /* Set up EMC Controller */ LPC_EMC->STATICWAITRD0 = DELAYCYCLES(55)+1; LPC_EMC->STATICWAITPAG0 = DELAYCYCLES(55)+1; LPC_EMC->CONTROL = 0x01; LPC_EMC->STATICCONFIG0 = (1<<7) | 1; LPC_EMC->STATICWAITOEN0 = DELAYCYCLES(30)+1; /*Enable Buffer for External Flash*/ LPC_EMC->STATICCONFIG0 |= 1<<19; |