Using CLKOUT for Diagnostic Purposes

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Using CLKOUT for Diagnostic Purposes

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by gregd on Tue Nov 13 11:02:16 MST 2012
The manual recommends using the CLKOUT signal to calibrate the RTC.  It is also useful for checking the frequency of all the clock outputs.  I am using 32-bit SDRAM in my design and it seems like you have to configure CLK0..CLK3 all four for EMC_CLKx in order for the SDRAM to function properly.  The only other spot that CLKOUT is brought out to is the M11 pin (LBGA256) which is used for ENET_TX_CLK on my board.  Is there any other way that you can get to the CLKOUT signal for use in RTC calibration and other diagnostics?

Thanks,
Greg Dunn
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by jgorsk on Mon Jan 19 07:12:39 MST 2015
Are you able to get stable 32kHz signal on the CLKn pins (CLKOUT function) when the CPU is running?

I can only get a stable signal when the CPU is stopped. When the CPU is running (not accessing RTC or clock generator registers) the signal at CLKn pins
has variable frequency and duty cycle. The frequency is 30.8 kHz +/- 100Hz. When the CPU is stopped in debug mode CLKOUT signal becomes stable and
the frequency is 32.768kHz. I tried all available CLK pins, they all worked the same way.

If any other than 32kHz clock is assigned to CLKOUT, the signal at CLKn pins is stable, regardless of the CPU operation.

I'm using the LPC4337 in 144 pin package
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by DF9DQ on Wed Nov 14 06:42:54 MST 2012
Hi Greg,

you could give this one a try:
Instead of selecting EMC_CLK0 for CLK0 pin, ..., EMC_CLK3 for CLK3 pin, use CLK0=EMC_CLK01 and CLK2=EMC_CLK23.

This will free up CLK1 and CLK3 for other functions like the CLKOUT signal.

Hopefully your hardware only uses CLK0 and/or CLK2...

Regards,
Rolf
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by gregd on Wed Nov 14 06:20:07 MST 2012
I finally figured out that I could just use one of the spare clock outputs (CGU_CLK0) to output the 32KHz signal to calibrate the RTC. 

I also determine during my investigation that the RTC_Init function in lpc43xx_rtc.c causes problems with you are running from 32 bit SDRAM.  As you mentioned, you have to configure all four clock outputs (CLK0..CLK3) for EMC_CLK in order for the SDRAM to work.  The RTC_Init function changes CLK0 to CLKOUT instead of EMC_CLK0.  This causes the SDRAM to quit working.  This bug can be fixed by simply removing the two following lines in lpc43xx_rtc.c:

LPC_SCU->SFSCLK_0 = 1 | (0x3<<2);
LPC_CGU->BASE_OUT_CLK = (CGU_CLKSRC_32KHZ_OSC<<24) |(1<<11);

Thanks for your reply,
Greg Dunn
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by larsjep on Wed Nov 14 02:02:40 MST 2012
Hi Greg,

I don't have any solution for you, but I have also noticed the problem with SDRAM.
The SDRAM only works if all clock outputs are configured to EMC_CLK.

It could be related to an other issuse that I have reported.
http://lpcware.com/content/forum/problem-executing-sdram-when-running-204mhz-hitex-eval-board
But I'm stilll waiting for an answer on this.

Best regards
  Lars
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