GPDMA usage question - ping-pong implementation

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by sfenwick76 on Wed Jun 11 06:23:29 MST 2014

I am trying to write a UART driver that uses ping-pong buffers for RX.  I have done this on other processors (STM Cortex M3 for example) by changing the "next" pointer while the DMA is running to swap between 2 buffers so I can read from one while the DMA is writing to the other.  Unfortunately, I found this note in the 43xx datasheet regarding the GPDMA LLI register

from 20.6.18: "Programming this register when the DMA channel is enabled may have unpredictable side effects."

I assume this means I cannot change the "next" pointer while the DMA is running.  Does anyone know how I would implement a ping-pong scheme for UART RX?  Do people have another suggestion for efficient UART RX implementation using DMA?  (Our UART application is a command line interface that will sometimes be driven by a script running on a PC.)