EMC boot pin configuration

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by sh on Thu Nov 21 04:12:18 MST 2013
Hi all,

When using EMC 16-bit boot mode, I observe that contrary to what is written in UM10503 V1.7 Chapter, address pins which are actively driven are A0..A20, and the remaining address pins are configured for passive pull-up rather than pull-down. I am not using a header in my image. The board I am trying this with is an old Hitex LPC4350 eval board (version A2).

I haven't found anything in the errata that would explain this discrepancy between chip and documentation.

The NOR flash chip used on the Hitex board has a capacity of 4 MByte and thus needs A21. The fact that this pin is being passively pulled up instead of pulled down upsets the booting process.

Am I doing something wrong, is the documentatiuon wrong, or is it a bug in the LPC4350 boot ROM?