lpcware

[SOLVED] DMA Burst mode -> DAC

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by Auslander on Wed Nov 20 04:24:47 MST 2013
I'm trying to run code from Application Note AN10917 on LPC4357 without any sucess. I'm wondering what i'm doing wrong.

int main (void)                                    // Main Program
{
    int i;

    SystemInit();

    for(i=0; i < WAVE_SAMPLE_NUM; i++)
        sinusoide = 512*sin(2*PI*i/WAVE_SAMPLE_NUM);

    for(i=0; i < WAVE_SAMPLE_NUM; i++)
        sinusoide = ((sinusoide + 512) << 6)// DACR bit 6-15, VALUE
             | 1 << 16;// DACR bit 16, BIAS = 1

    LPC_SCU->SFSP4_4 = 0;   //GIPO; EPD, EPUN, EZI morajo biti 0!
    LPC_GPIO_PORT->DIR[2] &=~ (1 << 4);    //P4_4 kot input
    LPC_SCU->ENAIO2 |= 1;   /*Enable analog function DAC on pin P4_4*/

    LLI0.source      = (uint32_t) &sinusoide[0];
    LLI0.destination = (uint32_t) &(LPC_DAC->CR);
    LLI0.next        = (uint32_t) &LLI0;
    LLI0.control     = 1<<26 | 2<<21 | 2<<18 | WAVE_SAMPLE_NUM;

    LPC_GPDMA->CONFIG = 1;                  // enable the GPDMA controller
    LPC_GPDMA->SYNC   =
(0<<15);        // enable synchro

    LPC_GPDMA->C0SRCADDR  = (uint32_t) &sinusoide[0];
    LPC_GPDMA->C0DESTADDR = (uint32_t) &(LPC_DAC->CR);
    LPC_GPDMA->C0LLI      = (uint32_t) &LLI0; // linked lists for ch0
    LPC_GPDMA->C0CONTROL  = WAVE_SAMPLE_NUM   // transfer size (0 - 11) = 64
                            | (0 << 12)            // source burst size (12 - 14) = 1
                            | (0 << 15)            // destination burst size (15 - 17) = 1
                            | (2 << 18)            // source width (18 - 20) = 32 bit
                            | (2 << 21)            // destination width (21 - 23) = 32 bit
                            | (0 << 24)            // source AHB select (24) = AHB 0
                            | (0 << 25)            // destination AHB select (25) = AHB 0
                            | (1 << 26)            // source increment (26) = increment
                            | (0 << 27)            // destination increment (27) = no increment
                            | (0 << 28)            // mode select (28) = access in user mode
                            | (0 << 29)            // (29) = access not bufferable
                            | (0 << 30)            // (30) = access not cacheable
                            | (0 << 31);           // terminal count interrupt disabled

    LPC_GPDMA->C0CONFIG   =  1   // channel enabled (0)
                            | (0 << 1) // source peripheral (1 - 5) = none
                            | (0x0F << 6)// destination peripheral (6 - 10) = DAC
                            | (1 << 11)// flow control (11 - 13) = mem to per
                            | (0 << 14)// (14) = mask out error interrupt
                            | (0 << 15)// (15) = mask out terminal count interrupt
                            | (0 << 16)// (16) = no locked transfers
                            | (0 << 18);// (27) = no HALT

/* DACclk = 25 MHz, so 10 usec interval*/
    LPC_DAC->CNTVAL = 250;
/* DMA, timer running, dbuff */
    LPC_DAC->CTRL   = 1<<3 | 1<<2 | 1<<1;          


    while(1) ;                                      // Loop forever
}


Did I missed something?

Outcomes