P3_0 for Output...

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by mubes on Wed Feb 03 08:13:52 MST 2016
OK, so this one is self-inflicted  8-)

I have laid a board that assumes an output is available on P3_0, just like it is on all its brothers and sisters. It's a very slow GPIO (<1Hz) and there's very little drive current required. Trouble is, NXP in their infinite wisdom didn't put a GPIO on that pin...and I didn't check.

I haven't quite reached the point where I need to actually deal with this problem yet, and I'm hoping I can address it by using the weak pullups and weak pulldowns until I roll a new board, but does anyone have any other bright ideas how to fix this one without hardware rework? I'd like these boards to be as 'close to final' as possible without visible rework on them if I can.

@NXP Guys....I don't suppose one of those 'Function reserved' for P3_0 happens to be a GPIO does it? Perhaps one that comes with caveats?