ADCHS interference

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ADCHS interference

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by gjdevos on Wed Nov 26 12:47:16 MST 2014
We have an LPC4370, 256 pin package connected to external RAM and some external peripherals through
the GPIO ports. When using the ADCHS at 10 Msample/s, we see strong interference of GPIO and EMC
activity in the acquired signal. What are the things to pay attention to, to minimize interference? I know about
the chapter on ADC interference in the manual about GPIO pin assignments next to the ADC pins. We
followed the advice given but it turns out this is not enough to remove the interference from the ADC samples.

Any suggestions are welcome. We are considering to add an external ADC to the LPC4370 to get rid of the
digital noise.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by bavarian on Wed Dec 03 06:32:43 MST 2014
You can't really avoid these effect on systems running with high speed signals. You can only try to limit them to an acceptable level.
A generic microcontroller is always a compromise between performance and price, any focus on specific aspects will either increase the price or limit the performance on another part of the system. Or both.
As we are not going to change the system and increase the price  8-) , you need to try the second option: limit the coupling effects.

For noise on the power supply domains:
[list]
  [*]  Use more than one decoupling capacitor on each pin to reduce ESR
  [*]  Use filter circuits to get rid of specific frequencies
[/list]

For crosstalking problems and frequency related problems
[list]
  [*]  Reduce the on-chip frequencies as much as you can. There is no need to run the CPU on 204MHz if you only need a 120MHz performance
  [*]  Reduce the current consumption of the MCU by switching off all blocks which are not needed
  [*]  Take care of the routing of the high speed signals (for example EMC) on the PCB
  [*]  Implement series resistors in the EMC signals (and maybe other fast digital interfaces) to reduce frequency responses
  [*]  Don't configure pins to high speed mode if not really required
[/list]

Another quite tricky hint:  in the LPC4350 LQFP package definitions you can see on which side of the silicon die the AD converter(s) are located. The signals nearby the AD pins are the most suspicious to couple "noise" into the analog ports. On the BGA package these suspicious pins can normally also be founded in the same section of the chip, also the bondwires from the die to the ball locations are structures the same way. So, if you can, try to avoid using these pins by finding the required function on another pin (if available).


Regards,
NXP Support Team
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by gjdevos on Thu Nov 27 13:04:34 MST 2014
We have a differential input amplifier for our signals. It seems the interference is introduced at the connection of our input to the LPC or inside the package.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by rocketdawg on Wed Nov 26 16:15:54 MST 2014
if you look at the LPC-link-2 schematic, page 2, you will see some filtering on VDDREF and VDDA using a number of caps and some BLM15HG601SN1D beads
this is minimal filtering and you might need a pie filter or better.
any noise on VDDREF is automatically applied to ADC conversions.board layout is very important as well, keep all digital away from all analog signals
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by wmues on Wed Nov 26 14:32:53 MST 2014
Giving the analog input signal of the ADC a low impedance. Use a OP-Amp as Buffer. You might try to mimic the low impedance by a big capacitor - just to test if it gets better.
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