Termination of Unused pins on LPC4350

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by gregd on Thu Dec 12 14:30:48 MST 2013
I have a few hardware questions about the LPC4350.

Is it necessary to terminate the following pins on the LPC4350FET256 if they are not used?  Is there a possibility for damage or higher current draw if they are left unterminated?

E3 (ADC0_0)
C3 (ADC0_1)
A4 (ADC0_2)
B5 (ADC0_3)
C6 (ADC0_4)
B3 (ADC0_5)
A5 (ADC0_6)
C5 (ADC0_7)


Is it recommend to use any series resistance on the SPI lines between the LPC4350 and external
SPI FLASH memory.

If only 2 16 bit SRAM chips are connected to the EMC bus to implement 32 bit SRAM memory, is it required to use any series resistance in the memory, address or control lines between the LPC4350 and the external SRAM.  We are not using any buffers since there are only 2 devices connected.

Greg Dunn

Greg Dunn