Termination of Unused pins on LPC4350

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

Termination of Unused pins on LPC4350

386 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by gregd on Thu Dec 12 14:30:48 MST 2013
I have a few hardware questions about the LPC4350.

Is it necessary to terminate the following pins on the LPC4350FET256 if they are not used?  Is there a possibility for damage or higher current draw if they are left unterminated?

E3 (ADC0_0)
C3 (ADC0_1)
A4 (ADC0_2)
B5 (ADC0_3)
C6 (ADC0_4)
B3 (ADC0_5)
A5 (ADC0_6)
C5 (ADC0_7)

A9 (WAKEUPO)
A10 (WAKEUP1)
C9 (WAKEUP2)
D8 (WAKEUP3)

Is it recommend to use any series resistance on the SPI lines between the LPC4350 and external
SPI FLASH memory.

If only 2 16 bit SRAM chips are connected to the EMC bus to implement 32 bit SRAM memory, is it required to use any series resistance in the memory, address or control lines between the LPC4350 and the external SRAM.  We are not using any buffers since there are only 2 devices connected.

Thanks
Greg Dunn


Thanks,
Greg Dunn
Labels (1)
0 Kudos
1 Reply

352 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by Martin84 on Fri Dec 13 09:29:43 MST 2013
Hi Greg

By default after reset the pins are configured as inputs with pullup enabled.

See Attachment.

Regards,

Martin
0 Kudos