lpcware

DMA cacheable, bufferable?

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by rockyh on Mon Oct 06 10:41:41 MST 2014
Hi,
I don't feel I have a good understanding of the "Cacheable" and "Bufferable" bits with regards to the LPC43xx DMA controller. The User Guide just mentions these options, but does not go into any detail, and I also cannot find any appnote that explains them. Can anybody explain what these options do?
Thanks

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