Bug in Chip_RGU_TriggerReset of LPCOpen 2.12 causes M0 to be released

Discussion created by lpcware Employee on Jun 15, 2016
Content originally posted in LPCWare by wlamers on Wed Jul 23 02:27:41 MST 2014
Function "void Chip_RGU_TriggerReset(CHIP_RGU_RST_T ResetNumber)" in LPCOpen 2.12 for LPC43xx causes the M0 to be released from reset (only after a succesfull boot was done without power down in between) if any (arbritray) reset is requested. This is simply caused by the fact that writing a '0' to bit 24 of register RESET_CTRL1 of the RGU causes the M0APP reset to be released. And this is exactly what is done in this function because all resets, exepect the one that is requested, are written 0. This can be solved easily by reading the ACTIVE_STATUS1 register first, inverse it, and write is to RESET_CTRL1 with the additional to be requested reset.

The above text is posted in the bug tracker. Post is this forum is just to be sure people see this.