lpcware

SDRAM reference design and code

Discussion created by lpcware Employee on Jun 15, 2016
Content originally posted in LPCWare by wlamers on Thu May 16 01:47:57 MST 2013

I have a design that requires both a SDRAM and an SD card. I know from this forum that there are some conflicting pin requirements for their clocks. I use a BGA256 IC, which should solve this issue.


I simply could copy the schematic designs for the SDRAM of the Keil, Hitex or Embest development boards, but this does of course not guarantee a flawlessy working SDRAM. Can someone help me with a working reference design (preferably schematic+layout+code)? I do not have special requirements for RAM size, port width and clock frequency/timings.


Thanks!

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