lpcware

must USB1 use PLL1 for clock?

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 18, 2016 by lpcware
Content originally posted in LPCWare by petekol on Wed Apr 27 08:31:14 MST 2016
i see and wonder following in User Manual (LPC43xx UM10503) for USB1:


Quote:

BASE_USB1_CLK:

Uses PLL1. CLK_USB1 must
be 60 MHz when the USB1 is
operated in low-speed and
full-speed modes. In
high-speed mode, the clock
is provided by the ULPI PHY



Must i use PLL1 direct? or can it be over clock divider A-E (it is still not to get 60Mhz if running 204Mhz)?
or i can use PLL0 running 480Mhz , divide it by 8 and set it to BASE_USB1_CLK? - my preferred option

Table 121 shows that i can't use divider>4 for PLL0USB... can i use PLL0AUDIO?

thank you

Outcomes