Where is PORTA and PORTB on LPC4357?

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Where is PORTA and PORTB on LPC4357?

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by acelink1 on Sat Mar 15 18:20:11 MST 2014
Hi Guys, I must be blind because I just can't seem to find the Memory Address of PORTA or PORTB?

In the manual I've found the address of PORT0 to 3 but there's no PORTA or PORTB.

I'm so confused. The Embeded Artists LPC4357 kit has a 128MB NAND Flash connected to PORTA and PORTB
but I can't find PORTA or PORTB.

I can switch bits on and off on the expansion ports which is connected to ports 0 - 3 but PORTA or B, just can't find any info.

I'm in need of serious help :)  (Not just mentally) hehehe :)

and Thanks guys for your support in my last posts. :)

Pete
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by JohnR on Tue Mar 18 06:17:41 MST 2014
Hi,

For ages I have been unable to understand the lines in, for instance, LPC43xx.h that describe the ports ,eg


#define GPIO_PORT_PIN0_PORT0_Pos  0                                                                        /*!< GPIO_PORT PIN0: PORT0 Position      */
#define GPIO_PORT_PIN0_PORT0_Msk (0x01UL << GPIO_PORT_PIN0_PORT0_Pos) /*!< GPIO_PORT PIN0: PORT0 Mask          */



What in this case does PIN0_PORT0 relate to?

The same scheme is used in the Peripherals page in the IDE and I have never understood that either.

Thanks for any help.

JohnR
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by acelink1 on Mon Mar 17 14:31:43 MST 2014
Yes I see, Thank you for the excellent support.  So in order to use PC_1 GPIO6[0]  I would need to do this:

    MOVW R0, 0x6000
    MOVT R0, 0x4008                 // SCU BASE ADDRESS
    MOV R1, 0x04                       // FUNCTION 4  GPIO6[0]
    STR R1,[R0,0x604]                // SCU BASE ADDRESS + PC_1 OFFSET.

Would that be correct?  I know I have to set the BITS in GPIO6 to OUTPUT.

Pete :)

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by bavarian on Mon Mar 17 06:52:25 MST 2014
Look here:

15.2 Pin description
On the LPC43xx, digital pins are grouped into 16 pin groups, named P0 to P9 and PA to PF, with up to 20 pins used per group.


These Ports are part of the i/o structure. Depending on the package we have more or less of these ports brought to the outside pins.
On each of these ports, e.g. on P0[1] or on PF[3], we can have up to 8 different functions. One of them is the GPIO function. The GPIO peripheral block itself has also a specific number of IOs, which can be mapped to these Ports. Unfortunately the word "Port" is also used in the GPIO chapter for e.g. GPIO Port 0. It is the port 0 of the GPIO block, each of the 15 IOs of this GPIO port is connected to several Port[F:0] by means of multiplexers. The Port is finally routed with a bond wire to a physical pin

Example:   GPIO0[4]  is connected internally to the Port P1_0, this port is connected to pin 38 on the LQFP144

Best regards,
NXP Support Team
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by Martin84 on Sun Mar 16 23:46:51 MST 2014
You have to differentiate between PORT0-F and GPIO0 - 7. Look at Chapter Pin Configuration.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by MarcVonWindscooting on Sun Mar 16 16:41:52 MST 2014
That drove me crazy 4 weeks ago. But if you keep searching the manual, you'll find:

page 360 (UM Rev 1.8) near the bottom:

PA_1 ...  I/O GPIO4[8].

That means, you have to consult both chapter 'GPIO' and chapter 'Pin configuration' and take care not to (accidentally) select the huge table for the wrong device.

And GPIO is not always pin function 0, but very often function 4.

EDIT: Maybe the attached files help you find, what you need? Untested however.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by acelink1 on Sun Mar 16 15:46:33 MST 2014
Hi Guys, please tell me what is going on???

The LPC 43xx USER MANUAL UM10503.PDF  says nothing about PORTA-F ?

Chapter 18: LPC43xx GPIO - This says that there is only PORT0 to 7 available? 

Do I have the correct manual?   I am using the LPC4357.

Now I'm totally confused !!!

Pete :(
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by starblue on Sun Mar 16 14:24:57 MST 2014
Have you tried looking at the schematics of the Embedded Artists LPC4357 kit?

Unfortunately I can't.
It seems you need to register the serial number of the kit to access it. :-(
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by salamlora1 on Sun Mar 16 12:35:42 MST 2014
I cant access to this website but i fine something useful read page 7 of this datasheet
http://www.silica.com/fileadmin/02_Products/Productdetails/NXP/Silica_NXP_LPC4357_53_37_33-ds.pdf
That’s the address of a pin in TFBGA and LBGA 
For example pinA14
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by salamlora1 on Sun Mar 16 02:37:30 MST 2014
the datasheet says
Up to eight GPIO pins can be selected from all GPIO pins as edge and level
sensitive interrupt sources.
its meand (A) not means (10)
i think port0 are porta and port1 are portb
in some includes files  the port0 are define as porta
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