Content originally posted in LPCWare by bavarian on Mon Mar 17 06:52:25 MST 2014
Look here:
15.2 Pin description
On the LPC43xx, digital pins are grouped into 16 pin groups, named P0 to P9 and PA to PF, with up to 20 pins used per group.
These Ports are part of the i/o structure. Depending on the package we have more or less of these ports brought to the outside pins.
On each of these ports, e.g. on P0[1] or on PF[3], we can have up to 8 different functions. One of them is the GPIO function. The GPIO peripheral block itself has also a specific number of IOs, which can be mapped to these Ports. Unfortunately the word "Port" is also used in the GPIO chapter for e.g. GPIO Port 0. It is the port 0 of the GPIO block, each of the 15 IOs of this GPIO port is connected to several Port[F:0] by means of multiplexers. The Port is finally routed with a bond wire to a physical pin
Example: GPIO0[4] is connected internally to the Port P1_0, this port is connected to pin 38 on the LQFP144
Best regards,
NXP Support Team