DMA to/from SPIFI

[lpcware]

Content originally posted in LPCWare by equinox on Mon Jul 30 06:07:49 MST 2012
Hi -

I am running into difficulty using DMA with the SPIFI interface as the source or destination peripheral. The LMP43xx user manual seems to imply that this is possible, by setting the DMA channel configuration source or destination peripheral to 0, but in practice this doesn't seem to work. Also, the code in the DMA driver (lpc43xx_gpdma.c/.h) does not seem to support SPIFI, suggesting that maybe this isn't possible.

Is the user manual misleading, or am I misreading it? Of course, I can configure the SPIFI and use a memory-to-memory DMA transfer to read from the address range mapped to SPIFI, but it's not possible to write to SPIFI using this mechanism, which is a major problem.

Thanks for your help.

[lpcware]

Content originally posted in LPCWare by avenuti on Mon Jan 18 08:28:35 MST 2016
For anyone in the future who finds themselves here: it IS possible to use DMA to program / write to flash using SPIFI !!

Note: the following example was done using the LPC1837 chip

As equinox says above, it is not possible to write to flash using a DMA memory-to-memory transfer while in memory-mapped mode, because memory-mapped mode does not support flash programming.

However, it is possible to use DMA to send a write command! Here's what you need to do:

-Clear DMA channel CONTROL and CONFIG registers
-(DMA muxing is SPIFI by default but may need to be reset)
-Set FLOWCNTRL to memory to perhipheral (peripheral control)
-Set DMA CONTROL with: SWIDTH:Word, D:AHB Master 1, SI: Source address is incremented
   ((2<<18)|(1<<25)|(1<<26))
-Set the memory source address to DMA SRCADDR
-Set the SPIFI data register address (0x40003014) to DMA DESTADDR
-Clear SPIFI status and send Write Enable to flash
-Set the destination address to SPIFI ADDR
-Enable SPIFI DMA request by setting bit 31 in SPIFI CTRL (listed as both DMAEN and DRQEN in the manual)
-Enable the DMA channel in CONFIG
-Clear pending SPIFI interrupt in NVIC and SPIFI STAT (INTRQ)
-Enable SPIFI interrupt in NVIC and SPIFI CTRL (INTEN) (this is necessary to clear DMA enable)
(This interrupt is undocumented; bit 30 of NVIC->ISER[0], listed as RESERVED4_IRQn)
-Write the program command to the SPIFI CMD register (including data length, which does not need to be included in the DMA command register)

SPIFI_IRQHandler should be set up to clear DMA enable (SPIFI CTRL)

The SPIFI hardware needs to be polled before being used again
e.g. while(LPC_SPIFI->STAT & (1<<1));
The flash chip needs to be polled before additional commands are sent
e.g. (using lpc SPIFIlib) while(pSpifi->pFamFx->devGetStatus(pSpifi) & 1);

Good luck!

[lpcware]

Content originally posted in LPCWare by bavarian on Fri Nov 13 04:21:11 MST 2015
Nothing has changed in the architecture of this interface. Writing to the qSPI flash means programming the qSPI flash, this requires a procedure the DMA cannot handle. The DMA works only one way and cannot handle any feedback, e.g. wait for an acknowledge etc. You could only dma the block of data you want to program into a specific RAM location, then create an interrupt with the DMA and do the rest with the programming features of the SPIFI lib.

Regards,
NXP Support Team

[lpcware]

Content originally posted in LPCWare by avenuti on Mon Nov 09 15:29:12 MST 2015
Was this ever resolved? Is it possible to use DMA to write to a flash chip over SPIFI / using the SPIFI library? I understand this would not work in memory mapped mode, since it is not possible to erase/write flash in memory mapped mode, but what about in command mode?

[lpcware]

Content originally posted in LPCWare by Pacman on Sun Oct 14 20:32:07 MST 2012
I believe might be possible.

Try typing 'AN11206' in the search-field in the top/right corner and see if that does what you're looking for.
Look at the diagram on page 5. (This is pretty impressive, if you ask me.)


Love
Jens

[lpcware]

Content originally posted in LPCWare by DPeters on Tue Jul 31 07:14:30 MST 2012
I don't know how the SPIFI would be used in a DMA peripheral configuration, perhaps to transfer data to the SPIFI configuration registers.  You will not be able to perform a memory-to-memory transfer to a SPIFI address because it is flash memory-  just as it is not possible to do a DMA transfer to a flash memory region inside the MCU.  You must use the SPIFI ROM API routines to perform erasing and writing of the external QSPI flash.