lpcware

dual core DMA restriction?

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Oct 3, 2017 by nos1989
Content originally posted in LPCWare by jpplus on Sun Jan 11 22:04:19 MST 2015
Hi all,
I have an audio application running on LPC4337. The I2S and SGPIO will be configured to trigger DMA both on M0 and M4. As I need access DMA controller from two cores, my question are:
1) can chip  genereates DMA interrupt for DUAL core in same time?
2) can I init the DMA controller in one core and use that and generate interrupt in another core?
3) can IS2 is init in one core and generate DMA interrupt in another core?

I think DMA only need to be init in one core as there is only one DMA hardware, but can be directly operated from both core.
I am new to this chip, but hope to get some hints on this two core DMA stuff.
thanks

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