lpcware

SDRAM data shifts

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by wlamers on Thu Jun 20 13:16:44 MST 2013

During a read write test of a SDRAM I get some sort of bitshift of the data.


The SDRAM is a Micron MT48LC16M16A2 (16 bit wide).


Configured as (Row, Bank, Column): 256 Mb (16Mx16), 4 banks, row length = 13, column length = 9


 


If i write, for example, 0x1234ABCD in an array of length 1024 (or whatever, length does not matter) and I read those locations back I get this:


 


pos[0] = 0xABCD1234
pos[1] = 0xABCD1234
pos[2] = 0xABCD1234
pos[3] = 0x12341234
pos[4] = 0xABCD1234
pos[5] = 0xABCD1234
pos[6] = 0xABCD1234
pos[7] = 0x12341234
pos[8] = 0xABCD1234
pos[9] = 0xABCD1234
pos[10] = 0xABCD1234
pos[11] = 0x12341234


 


Note that every 4th location is different and all the others are shifted (as it appears).


 


Anybody a clue what is going on here? Has this something to do with the burst length maybe?

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