can LPC4330 i2s interface to a slave codec with combined tx and rx bclk?

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by acamilo on Fri Sep 13 22:37:14 MST 2013
Hello, i'm trying to interface a NAU8811 to i2s0 on a LPC4330.

The codec has an i2c interface with 4 connections. A shared bit clock, data in/out and a channel clock(WS).
A MCLK is generated internally based on the BCLK.

Is it possible to use one clock and WS for both tx and rx on the 4330 instead of a seperate TX_SCK,TX_WS and RX_SCK,RX_WS?