Reset Cause

[lpcware]

Content originally posted in LPCWare by PhilYoung on Mon Sep 03 05:39:56 MST 2012
I'm debugging a boot loader that verifies and runs one of multiple images in a failsafe mode, for this I need to determine if a reset was caused by the watchdog, an app call, or a HW reset.

According to the UM LPC_RGU->RESET_EXT_STAT0 should return the reset cause, however when I enter the code I find this is always zero.

Is this being cleared by the boot rom code, and if so where is it storing the status?.

Has anybody found this yet?.

[lpcware]

Content originally posted in LPCWare by starblue on Wed Sep 12 00:53:53 MST 2012
There is a new manual dated September 3, which contain relevant updates.

[lpcware]

Content originally posted in LPCWare by JohnR on Thu Sep 06 05:49:39 MST 2012
While we are beefing -- NXP manuals, at least the one for the LPC4350 devices, never show a list of changes from the previous version. This makes it very difficult to see if there has been a change that might affect one's usage of the device.

John.

[lpcware]

Content originally posted in LPCWare by PhilYoung on Wed Sep 05 05:41:13 MST 2012
It would really help if the documents on this site were managed correctly.
The errata for LPC43xx eppears in resources as updated 2012-02-23 19:55.

actually downloading the document it was updated to Rev 2.2 on 8 August 2012, the previous update ( rev 2.1 ) which still has the same document name was updated on 13 July.

How are we supposed to know when there is a new errata for a device if the document date or version number in the resources list is not updated.

This really makes life difficult.

[lpcware]

Content originally posted in LPCWare by fcarlo on Tue Sep 04 23:39:48 MST 2012
The errata sheet has been updated recently. Please check the latest version:

RGU.1: CORE_RST status bits in the RESET_STATUS0 register do not work

The CORE_RST bits in the RGU's status register do not properly indicate the cause of the
core reset. When th e core is reset the RGU is also reset and as a result the state of these
bits will always read with their default values.  As a result, these status bits cannot be used
to determine the cause of the core reset.