lpcware

Unstable RAM access after changing speed to 204MHz

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by Jon Reece on Wed Mar 27 02:36:30 MST 2013
Hi,

I am using an EA OEM board for an application and I am trying to increase the speed of the processor to reduce the processing time. I have successfully changed the clock speed in steps following the BlickFast example. When I query the clock speed I now get 204000000 as expected. However, when I try and access the SDRAM the processor will disconnect from the debugger and I cannot stop/reprogram it.

Do you have an example of setting up the SDRAM peripheral to work at 102MHz with a core clock of 204MHz? The ISSI RAM chip that we are using, IS42S32800D-6BLI, should support bus speeds of upto 166MHz so I don't believe that 102MHz should be a problem. I am using the NS2CLK function to get the register timing values which implies that I should be able to change the clock speed and the ram *should* (as I understand it) work.

If you need any more information please let me know,

Thanks
Jon

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