SDRAM refresh cycle / LPC_EMC->DYNAMICREFRESH / Finding correct value

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by hlsa on Sun Sep 27 23:05:42 MST 2015
I am using the LPC4357 @ 204 MHz with 102 MHz EMC clock and an ISSI IS42S32800G-7BLI SDRAM.
The SDRAM requires 4096 refresh cycles every 64ms.

So far I have set the dynamic refresh register LPC_EMC->DYNAMICREFRESH to 100. If I understood the user manual correctly, this equals a refresh cycle time of 100 * 16 * 4096 * 1/102MHz = 64.25ms.

If I understand it further correctly, this is too long and I would need a value for LPC_EMC->DYNAMICREFRESH, which is a little bit lower, e.g. 98 * 16 * 4096 * 1/102MHz = 63 ms.

Am I correct? Can anyone please confirm this?

Many thanks,

P.S. My system works pretty fine. However, since reliability of our products is extremely important, I do not want to run anything out of spec.